CSD18531Q5A 60-V N-Channel NexFET™ Power MOSFET

1 Features

Ultra-Low Q_g and Q_gd
Low-Thermal Resistance
Avalanche Rated
Logic Level
Lead-Free Terminal Plating
RoHS Compliant
Halogen Free
SON 5-mm × 6-mm Plastic Package

2 Applications

DC-DC Conversion
Secondary Side Synchronous Rectifier
Battery Motor Control

3 Description

This 60-V, 3.5-mΩ, 5-mm × 6-mm NexFET™ power MOSFET is designed to minimize losses in power conversion applications.

Top View

Product Summary

T_A = 25°C		TYPICAL VALUE		UNIT
V_DS	Drain-to-Source Voltage	60		V
Q_g	Gate Charge Total (10 V)	36		nC
Q_gd	Gate Charge Gate-to-Drain	5.9		nC
R_DS(on)	Drain-to-Source On-Resistance	V_GS = 4.5 V	4.4	mΩ
R_DS(on)	Drain-to-Source On-Resistance	V_GS = 10 V	3.5	mΩ
V_GS(th)	Threshold Voltage	1.8		V

Device Information⁽¹⁾

DEVICE	QTY	MEDIA	PACKAGE	SHIP
CSD18531Q5A	2500	13-Inch Reel	SON 5.00-mm × 6.00-mm Plastic Package	Tape and Reel
CSD18531Q5AT	250	7-Inch Reel	SON 5.00-mm × 6.00-mm Plastic Package	Tape and Reel

For all available packages, see the orderable addendum at the end of the data sheet.

Absolute Maximum Ratings

T_A = 25°C		VALUE	UNIT
V_DS	Drain-to-Source Voltage	60	V
V_GS	Gate-to-Source Voltage	±20	V
I_D	Continuous Drain Current (Package Limited)	100	A
	Continuous Drain Current (Silicon Limited), T_C = 25°C	134
	Continuous Drain Current⁽¹⁾	19
I_DM	Pulsed Drain Current⁽²⁾	400	A
P_D	Power Dissipation⁽¹⁾	3.8	W
P_D	Power Dissipation, T_C = 25°C	156	W
T_J	Operating Junction	–55 to 175	°C
T_stg	Storage Temperature	–55 to 175	°C
E_AS	Avalanche Energy, Single Pulse I_D = 67 A, L = 0.1 mH, R_G = 25 Ω	224	mJ

Typical R_θJA = 40°C/W on a 1-in², 2-oz Cu pad on a
0.06-in thick FR4 PCB.
Max R_θJC = 1°C/W, pulse duration ≤ 100 μs, duty cycle ≤ 1%.

R_DS(on) vs V_GS

Gate Charge

4 Revision History

Changes from F Revision (October 2016) to G Revision

Changed temperature range from 150°C : to 175°CGo
Changed I_DM using 175°C data from 370 A : to 400 AGo
Changed P_D using 175°C data from 3.1 W : to 3.8 WGo
Changed Figure 6 to extend to 175°CGo
Changed Figure 8 to extend to 175°CGo
Changed Figure 10 using 175°C dataGo
Changed Figure 12 to extend to 175°CGo

Changes from E Revision (August 2015) to F Revision

Changed the 125°C RDS(on) vs VGS curve to reflect typical part characterizationGo
Changed the 125°C curve in Figure 7 to reflect typical part characterizationGo
Added Receiving Notification of Documentation Updates section to the Device and Documentation Support sectionGo

Changes from D Revision (May 2015) to E Revision

Corrected device size in description from m to mm.Go
Corrected package type to SON. Go

Changes from C Revision (March 2015) to D Revision

Added Community Resources. Go

Changes from B Revision (October 2012) to C Revision

Added part number to title. Go
Changed Q_g value to 36 nC, measured at 10 V. Go
Added 7" reel to Ordering Information. Go
Increase max pulsed current to 370 A. Go
Added line for max power dissipation with the case temperature held to 25°C.Go
Updated pulsed current conditions. Go
Updated Figure 1 to show Z_θJC curves.Go
Updated Figure 10Go
Updated Figure 12. Go

Changes from A Revision (June 2012) to B Revision

Changed the Transconductance TYP value From: 177 S To: 128 S.Go
Changed the Turn On and Turn Off Delay Time, Rise and Fall Time Test. Conditions From: I_DS = 22 A, R_G = 2 Ω To: I_DS = 22 A, R_G = 0 Ω. Go
Changed the Q_rr Reverse Recovery Charge TYP value From: 68 nC To: 100 nC. Go

Changes from * Revision (June 2012) to A Revision

Added T_A = 25°C to the Product Summary tableGo

5 Specifications

5.1 Electrical Characteristics

T_A = 25°C (unless otherwise stated)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
STATIC CHARACTERISTICS
BV_DSS	Drain-to-source voltage	V_GS = 0 V, I_D = 250 μA	60			V
I_DSS	Drain-to-source leakage current	V_GS = 0 V, V_DS = 48 V			1	μA
I_GSS	Gate-to-source leakage current	V_DS = 0 V, V_GS = 20 V			100	nA
V_GS(th)	Gate-to-source threshold voltage	V_DS = V_GS, I_D = 250 μA	1.5	1.8	2.3	V
R_DS(on)	Drain-to-source on-resistance	V_GS = 4.5 V, I_D = 22 A		4.4	5.8	mΩ
R_DS(on)	Drain-to-source on-resistance	V_GS = 10 V, I_D = 22 A		3.5	4.6	mΩ
g_fs	Transconductance	V_DS = 30 V, I_D = 22 A		128		S
DYNAMIC CHARACTERISTICS
C_iss	Input capacitance	V_GS = 0 V, V_DS = 30 V, ƒ = 1 MHz		3200	3840	pF
C_oss	Output capacitance			380	456	pF
C_rss	Reverse transfer capacitance			11	14	pF
R_G	Series gate resistance			1.2	2.4	Ω
Q_g	Gate charge total (4.5 V)	V_DS = 30 V, I_D = 22 A		18	22	nC
Q_g	Gate charge total (10 V)			36	43	nC
Q_gd	Gate charge gate-to-drain			5.9		nC
Q_gs	Gate charge gate-to-source			6.9		nC
Q_g(th)	Gate charge at V_th			5.2		nC
Q_oss	Output charge	V_DS = 30 V, V_GS = 0 V		32		nC
t_d(on)	Turnon delay time	V_DS = 30 V, V_GS = 10 V, I_DS = 22 A, R_G = 0 Ω		4.4		ns
t_r	Rise time			7.8		ns
t_d(off)	Turnoff delay time			20		ns
t_f	Fall time			2.7		ns
DIODE CHARACTERISTICS
V_SD	Diode forward voltage	I_SD = 22 A, V_GS = 0 V		0.8	1	V
Q_rr	Reverse recovery charge	V_DS= 30 V, I_F = 22 A, di/dt = 300 A/μs		100		nC
t_rr	Reverse recovery time	V_DS= 30 V, I_F = 22 A, di/dt = 300 A/μs		40		ns

5.2 Thermal Information

T_A = 25°C (unless otherwise stated)

THERMAL METRIC		MIN	TYP	MAX	UNIT
R_θJC	Junction-to-case thermal resistance⁽¹⁾			1.0	°C/W
R_θJA	Junction-to-ambient thermal resistance⁽¹⁾⁽²⁾			50	°C/W

(1) R_θJC is determined with the device mounted on a 1-in² (6.45-cm²), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in (3.81-cm × 3.81-cm), 0.06-in (1.52-mm) thick FR4 PCB. R_θJC is specified by design, whereas R_θJA is determined by the user’s board design.

(2) Device mounted on FR4 material with 1-in² (6.45-cm²), 2-oz (0.071-mm) thick Cu.