DRA71x Infotainment Applications Processor

1 Device Overview

1.1 Features

• Architecture designed for infotainment applications
• Video, image, and graphics processing support
  • Full-HD video (1920 × 1080p, 60 fps)
  • Multiple video input and video output
  • 2D and 3D graphics
• Arm®Cortex®-A15 microprocessor subsystem
• C66x floating-point VLIW DSP
  • Fully object-code compatible with C67x and C64x+
  • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
• Up to 512KB of on-chip L3 RAM
• Level 3 (L3) and Level 4 (L4) interconnects
• DDR3/DDR3L Memory Interface (EMIF) module
  • Supports up to DDR-1333 (667 MHz)
  • Up to 2GB across single chip select
• Dual Arm® Cortex®-M4 Image Processing Units (IPU)
• IVA-HD subsystem
• Display subsystem
  • Display controller With DMA engine and up to three pipelines
  • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
• 2D-graphics accelerator (BB2D) subsystem
  • Vivante® GC320 core
• Video Processing Engine (VPE)
• Single-core PowerVR™ SGX544 3D GPU
• One Video Input Port (VIP) module
  • Support for up to four multiplexed input ports
• General-Purpose Memory Controller (GPMC)
• Enhanced Direct Memory Access (EDMA) controller
• 2-port gigabit ethernet (GMAC)
  • Up to two external ports
• Sixteen 32-bit general-purpose timers
• 32-Bit MPU watchdog timer
• Six high-speed inter-integrated circuit (I²C) ports
• HDQ™/1-Wire® interface
• Ten configurable UART/IrDA/CIR modules
• Four Multichannel Serial Peripheral Interfaces (McSPI)
• Quad SPI Interface (QSPI)
• Media Local Bus Subsystem (MLBSS)
• Eight Multichannel Audio Serial Port (McASP) modules
• SuperSpeed USB 3.0 dual-role device
• High-speed USB 2.0 dual-role device
• High-speed USB 2.0 on-the-go
• Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
• PCI Express® 3.0 subsystems with two 5-Gbps lanes
  • One 2-lane Gen2-compliant port
  • or two 1-lane Gen2-compliant ports
• Dual Controller Area Network (DCAN) modules
  • CAN 2.0B protocol
• MIPI® CSI-2 camera serial interface
• Up to 186 General-Purpose I/O (GPIO) pins
• Device security features
  • Hardware crypto accelerators and DMA
  • Firewalls
  • JTAG lock
  • Secure keys
  • Secure ROM and boot
  • Customer programmable keys
• Power, reset, and clock management
• On-chip debug with CTools technology
• 28-nm CMOS technology
• 17 mm × 17 mm, 0.65-mm pitch, 538-pin BGA (CBD)

1.2 Applications

• Human-machine interface (HMI)
• Navigation
• Digital and analog radio
• Multimedia playback
• Automotive display audio systems
• Automotive entry navigation and multimedia systems
• Automotive digital cluster systems