SLVSG27A
July 2022 – August 2022
DRV3255-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device and Documentation Support
5.1
Device Support
5.1.1
Device Nomenclature
5.2
Documentation Support
5.2.1
Receiving Notification of Documentation Updates
5.3
Support Resources
5.4
Trademarks
5.5
Electrostatic Discharge Caution
5.6
Glossary
6
Mechanical, Packaging, and Orderable Information
6.1
Package Option Addendum
6.2
Tape and Reel Information
Package Options
Mechanical Data (Package|Pins)
PAP|64
MPQF071C
Thermal pad, mechanical data (Package|Pins)
PAP|64
PPTD079K
Orderable Information
slvsg27a_oa
slvsg27a_pm
1
Features
AEC-Q100 qualified for automotive applications:
Device ambient temperature grade 0: –40°C to +150°C
Device HBM ESD classification level 2
Device CDM ESD classification level C4B
Functional Safety-Compliant
targeted
Developed for functional safety applications
Documentation to aid ISO 26262 system design will be available upon production release
Systematic capability up to ASIL D targeted
Three N-Channel half-bridge gate driver
3.5-A/4.5-A
max peak gate drive current
Power architecture optimized for 48-V applications
12-V/48-V split supply architecture
95-V transient absolute maximum rating of DC link power supply (DHCP)
105-V Bootstrap voltage to support 90-V MOSFET operating voltage range
Bootstrap with charge pump for 100% duty cycle
Integrated configurable Active Short Circuit (ASC) function
Low-side and High-side ASC support
Device pin control available
Fault handling capability
Serial peripheral interface (SPI) with CRC
Supports 3.3-V and 5-V logic inputs
Advanced
protection features
Battery voltage monitors
MOSFET V
DS
overcurrent monitors
MOSFET V
GS
gate fault monitors
Analog built in self test
Internal regulator and clock monitors
Device thermal warning and shutdown
Fault condition indicator pin
s