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DATA SHEET
DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver
1 Features
- Designed for Signal Rates up to 400 Mbps
- Flow-Through Pinout Simplifies PCB Layout
- 150-ps Channel-to-Channel Skew (Typical)
- 100-ps Differential Skew (Typical)
- 2.7-ns Maximum Propagation Delay
- 3.3-V Power Supply Design
- High Impedance LVDS Inputs on Power Down
- Low Power Design (40 mW at 3.3-V Static)
- Interoperable With Existing 5-V LVDS Drivers
- Accepts Small Swing (350 mV Typical) Differential Signal Levels
- Supports Input Failsafe
- Open, Short, and Terminated
- 0 V to −100 mV Threshold Region
- Operating Temperature Range: –40°C to +85°C
- Meets or Exceeds ANSI/TIA/EIA-644 Standard
- Available in TSSOP Package