LM5134 Single 7.6-A Peak Current Low-Side Gate Driver With a PILOT Output

1 Features

7.6-A and 4.5-A Peak Sink and Source Drive Current for Main Output
820-mA and 660-mA Peak Sink and Source Current for PILOT Output
4-V to 12.6-V Single-Power Supply
Matching Delay Time Between Inverting and Non-Inverting Inputs
TTL/CMOS Logic Inputs
Up to 14-V Logic Inputs (Regardless of VDD Voltage)
–40°C to 125°C Junction Temperature Range

2 Applications

Motor Drivers
Solid-State Power Controllers
Power Factor Correction Converters

3 Description

The LM5134 is a high-speed single low-side driver capable of sinking and sourcing 7.6-A and 4.5-A peak currents. The LM5134 has inverting and noninverting inputs that give the user greater flexibility in controlling the FET. The LM5134 features one main output, OUT, and an extra gate drive output, PILOT. The PILOT pin logic is complementary to the OUT pin, and can be used to drive a small MOSFET located close to the main power FET. This configuration minimizes the turnoff loop and reduces the consequent parasitic inductance. It is particularly useful for driving high-speed FETs or multiple FETs in parallel. The LM5134 is available in the 6-pin
SOT-23 package and the 6-pin WSON package with an exposed pad to aid thermal dissipation.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
LM5134	SOT-23 (6)	2.90 mm × 1.60 mm
LM5134	WSON (6)	3.00 mm × 3.00 mm

For all available packages, see the orderable addendum at the end of the data sheet.

Noninverting Input

Inverting Input

4 Revision History

Changes from B Revision (April 2013) to C Revision

Added ESD Ratings table, Feature Description section, Device Functional Modes section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. Go

Changes from A Revision (April 2013) to B Revision

Changed layout of National Data Sheet to TI formatGo

5 Pin Configuration and Functions

DBV Package, NGG Package

6-Pin SOT-23, 6-Pin WSON

Top View

Pin Functions

PIN		I/O	DESCRIPTION	APPLICATION INFORMATION
NAME	NO.	I/O	DESCRIPTION	APPLICATION INFORMATION
VDD	1	—	Gate drive supply	Locally decouple to VSS using low ESR/ESL capacitor located as close as possible to the IC.
PILOT	2	O	Gate drive output for an external turnoff FET	Connect to the gate of a small turnoff MOSFET with a short, low inductance path. The turnoff FET provides a local turnoff path.
OUT	3	O	Gate drive output for the power FET	Connect to the gate of the power FET with a short, low inductance path. A gate resistor can be used to eliminate potential gate oscillations.
VSS	4	—	Ground	All signals are referenced to this ground.
INB	5	I	Inverting logic input	Connect to VSS when not used.
IN	6	I	Non-inverting logic input	Connect to VDD when not used.
EP	EP	—	Exposed Pad	It is recommended that the exposed pad on the bottom of the package be soldered to ground plane on the PC board, and that ground plane extend out from beneath the IC to help dissipate heat.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Pin voltage	VDD to VSS	−0.3	14	V
Pin voltage	IN, INB to VSS	−0.3	14	V
Junction temperature, T_J			150	°C
Storage temperature, T_stg		−55	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

	MIN	NOM	MAX	UNIT
Gate drive supply, VDD	4		12.6	V
Operating junction temperature	–40		125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LM5134		UNIT
		DBV (SOT-23)	NGG (WSON)
		6 PINS	6 PINS
R_θJA	Junction-to-ambient thermal resistance	105.9	51	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	52.1	47	°C/W
R_θJB	Junction-to-board thermal resistance	21	25.3	°C/W
ψ_JT	Junction-to-top characterization parameter	1.2	0.6	°C/W
ψ_JB	Junction-to-board characterization parameter	20.5	24.5	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	N/A	5.8	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

T_J = 25°C, VDD = 12 V, unless otherwise specified. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at T_J = 25°C, and are provided for reference purposes only.⁽¹⁾.

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
POWER SUPPLY
VDD	VDD operating voltage	T_J = –40°C to +125°C		4		12.6	V
UVLO	VDD undervoltage lockout	VDD rising	T_J = 25°C		3.6		V
UVLO	VDD undervoltage lockout	VDD rising	T_J = –40°C to +125°C	3.25		4	V
	VDD undervoltage lockout hysteresis				0.36		V
	VDD undervoltage lockout to main output delay time	VDD rising			500		ns
I_DD	VDD quiescent current	IN = INB = VDD	T_J = 25°C		0.8		mA
I_DD	VDD quiescent current	IN = INB = VDD	T_J = –40°C to +125°C			2	mA
OUTPUT
R_ON-DW (SOT23-6)	Main output resistance – pulling down	VDD = 10 V, I_OUT = –100 mA	T_J = 25°C		0.15		Ω
		VDD = 10 V, I_OUT = –100 mA	T_J = –40°C to +125°C			0.45	Ω
		VDD = 4.5 V, I_OUT = –100 mA	T_J = 25°C		0.2		Ω
		VDD = 4.5 V, I_OUT = –100 mA	T_J = –40°C to +125°C			0.5	Ω
R_ON-DW (WSON)	Main output resistance – pulling down	VDD = 10 V, I_OUT = –100 mA	T_J = 25°C		0.2		Ω
		VDD = 10 V, I_OUT = –100 mA	T_J = –40°C to +125°C			0.5	Ω
		VDD = 4.5 V, I_OUT = –100 mA	T_J = 25°C		0.25		Ω
		VDD = 4.5 V, I_OUT = –100 mA	T_J = –40°C to +125°C			0.55	Ω
	Power-off pulldown resistance	VDD = 0 V, I_OUT = –10 mA			1.5	10	Ω
	Power-off pulldown clamp voltage	VDD = 0 V, I_OUT = –10 mA			0.7	1	V
	Peak sink current	C_L = 10,000 pF			7.6		A
R_ON-UP (SOT23-6)	Main output resistance - pulling up	VDD = 10 V, I_OUT = 50 mA	T_J = 25°C		0.7		Ω
		VDD = 10 V, I_OUT = 50 mA	T_J = –40°C to +125°C			1.3	Ω
		VDD = 4.5 V, I_OUT = 50 mA	T_J = 25°C		1		Ω
		VDD = 4.5 V, I_OUT = 50 mA	T_J = –40°C to +125°C			1.9	Ω
R_ON-UP (WSON)	Main output resistance - pulling up	VDD = 10 V, I_OUT = 50 mA	T_J = 25°C		0.75		Ω
		VDD = 10 V, I_OUT = 50 mA	T_J = –40°C to +125°C			1.2	Ω
		VDD = 4.5 V, I_OUT = 50 mA	T_J = 25°C		1.14		Ω
		VDD = 4.5 V, I_OUT = 50 mA	T_J = –40°C to +125°C			1.85	Ω
	Peak source current	C_L = 10,000 pF			4.5		A
PILOT
R_ONP-DW	PILOT output resistance – pulling down	VDD = 10 V, I_OUT = –100 mA	T_J = 25°C		3.7		Ω
		VDD = 10 V, I_OUT = –100 mA	T_J = –40°C to +125°C			9	Ω
		VDD = 4.5 V, I_OUT = –100 mA	T_J = 25°C		4.7		Ω
		VDD = 4.5 V, I_OUT = –100 mA	T_J = –40°C to +125°C			12	Ω
	Peak sink current	C_L = 330 pF			820		mA
R_ONP-UP	PILOT output resistance – pulling up	VDD = 10 V, I_OUT = 50 mA	T_J = 25°C		6		Ω
		VDD = 10 V, I_OUT = 50 mA	T_J = –40°C to +125°C			11	Ω
		VDD = 4.5 V, I_OUT = 50 mA	T_J = 25°C		10.7		Ω
		VDD = 4.5 V, I_OUT = 50 mA	T_J = –40°C to +125°C			20	Ω
	Peak source current	C_L = 330 pF			660		mA
LOGIC INPUT
V_IH	Logic 1 input voltage	LM5134A, T_J = –40°C to +125°C		0.67 × VDD			V
V_IH	Logic 1 input voltage	LM5134B, T_J = –40°C to +125°C		2.4			V
V_IL	Logic 0 input voltage	LM5134A, T_J = –40°C to +125°C				0.33 × VDD	V
V_IL	Logic 0 input voltage	LM5134B, T_J = –40°C to +125°C				0.8	V
V_HYS	Logic-input hysteresis	LM5134A			0.9		V
V_HYS	Logic-input hysteresis	LM5134B			0.68		V
	Logic-input current	INB = VDD or 0	T_J = 25°C		0.001		µA
	Logic-input current	INB = VDD or 0	T_J = –40°C to +125°C			10	µA
THERMAL RESISTANCE
θ_JA	Junction to ambient	SOT23-6			90		°C/W
θ_JA	Junction to ambient	WSON-6			60		°C/W

(1) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).

6.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS		TYP	MAX	UNIT
FOR VDD = +10 V
t_R	OUT rise time	C_L = 1000 pF		3		ns
		C_L = 5000 pF		10
		C_L = 10,000 pF		20
t_F	OUT fall time	C_L = 1000 pF		2		ns
		C_L = 5000 pF		4.7
		C_L = 10,000 pF		7.2
t_D-ON	OUT turnon propagation delay	C_L = 1000 pF	T_J = 25°C	17		ns
t_D-ON	OUT turnon propagation delay	C_L = 1000 pF	T_J = –40°C to +125°C		40	ns
t_D-OFF	OUT turnoff propagation delay	C_L = 1000 pF	T_J = 25°C	12		ns
t_D-OFF	OUT turnoff propagation delay	C_L = 1000 pF	T_J = –40°C to +125°C		25	ns
	Main output break-before-make time			2.5		ns
t_PR	PILOT rise time	C_L = 330 pF		5.3		ns
t_PF	PILOT fall time	C_L = 330 pF		3.9		ns
t_PD-ON	OUT turnoff to PILOT turnon propagation delay	C_L = 330 pF		4.2		ns
t_PD-OFF	PILOT turnoff to OUT turnon propagation delay	C_L = 330 pF		6.4		ns
FOR VDD = +4.5 V
t_R	Rise time	C_L = 1000 pF		5		ns
		C_L = 5000 pF		14
		C_L = 10,000 pF		24
t_F	Fall time	C_L = 1000 pF		2.3		ns
		C_L = 5000 pF		5.4
		C_L = 10,00 0pF		7.2
t_D-ON	OUT turnon propagation delay	C_L = 1000 pF	T_J = 25°C	26		ns
t_D-ON	OUT turnon propagation delay	C_L = 1000 pF	T_J = –40°C to +125°C		50	ns
t_D-OFF	OUT turnoff propagation delay	C_L = 1000 pF	T_J = 25°C	20		ns
t_D-OFF	OUT turnoff propagation delay	C_L = 1000 pF	T_J = –40°C to +125°C		45	ns
	Main output break-before-make time			4.2		ns
t_PR	PILOT rise time	C_L = 330 pF		9.6		ns
t_Pf	PILOT fall time	C_L = 330 pF		3.7		ns
t_PD-ON	OUT turnoff to PILOT turnon propagation delay	C_L = 330 pF		7.5		ns
t_PD-OFF	PILOT turnoff to OUT turnon propagation delay	C_L = 330 pF		11.8		ns