SBOS849B December   2017  – February 2019 LMH5401-SP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      LMH5401-SP Small Signal Frequency Response
      2.      LMH5401-SP Driving an ADC12D1620QML
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = 5 V
    6. 7.6 Electrical Characteristics: VS = 3.3 V
    7. 7.7 Typical Characteristics: 5 V
    8. 7.8 Typical Characteristics: 3.3 V
  8. 8 Parameter Measurement Information
    1. 8.1  Output Reference Nodes and Gain Nomenclature
    2. 8.2  ATE Testing and DC Measurements
    3. 8.3  Frequency Response
    4. 8.4  S-Parameters
    5. 8.5  Frequency Response with Capacitive Load
    6. 8.6  Distortion
    7. 8.7  Noise Figure
    8. 8.8  Pulse Response, Slew Rate, and Overdrive Recovery
    9. 8.9  Power Down
    10. 8.10 VCM Frequency Response
    11. 8.11 Test Schematics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Fully-Differential Amplifier
      2. 9.3.2 Operations for Single-Ended to Differential Signals
        1. 9.3.2.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 9.3.2.2 DC-Coupled Input Signal Path Considerations for SE-DE Conversions
        3. 9.3.2.3 Resistor Design Equations for Single-to-Differential Applications
        4. 9.3.2.4 Input Impedance Calculations
      3. 9.3.3 Differential-to-Differential Signals
        1. 9.3.3.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
        2. 9.3.3.2 DC-Coupled, Differential-Input to Differential-Output Design Issues
      4. 9.3.4 Output Common-Mode Voltage
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation With a Split Supply
      2. 9.4.2 Operation With a Single Supply
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Stability, Noise Gain, and Signal Gain
      2. 10.1.2 Input and Output Headroom Considerations
      3. 10.1.3 Noise Analysis
      4. 10.1.4 Noise Figure
      5. 10.1.5 Thermal Considerations
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Driving Matched Loads
        2. 10.2.2.2 Driving Unmatched Loads For Lower Loss
        3. 10.2.2.3 Driving Capacitive Loads
        4. 10.2.2.4 Driving ADCs
          1. 10.2.2.4.1 SNR Considerations
          2. 10.2.2.4.2 SFDR Considerations
          3. 10.2.2.4.3 ADC Input Common-Mode Voltage Considerations—AC-Coupled Input
          4. 10.2.2.4.4 ADC Input Common-Mode Voltage Considerations—DC-Coupled Input
        5. 10.2.2.5 GSPS ADC Driver
        6. 10.2.2.6 Common-Mode Voltage Correction
        7. 10.2.2.7 Active Balun
      3. 10.2.3 Application Curves
    3. 10.3 Do's and Don'ts
      1. 10.3.1 Do:
      2. 10.3.2 Don't:
  11. 11Power Supply Recommendations
    1. 11.1 Supply Voltage
    2. 11.2 Single Supply
    3. 11.3 Split Supply
    4. 11.4 Supply Decoupling
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Device Nomenclature
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • QMLV (QML class V) MIL-PRF-38535 qualified, SMD 5962R1721401VXC
    • Radiation hardness assurance (RHA) up to 100-krad(Si) total ionizing dose (TID)
    • Single event latch-up (SEL) immune to
      LET = 85 MeV-cm2/mg
    • Qualified over the military temperature range (–55°C to 125°C)
  • Gain bandwidth product (GBP): 6.5 GHz
  • Excellent linearity performance:
    DC to 2 GHz
  • Slew rate: 17,500 V/µs
  • Low HD2, HD3 distortion
    (500 mVPP, 100 Ω, SE-DE, Gv = 17 dB)(1):
    • 100 MHz: HD2 at –91 dBc, HD3 at –95 dBc
    • 200 MHz: HD2 at –86 dBc, HD3 at –85 dBc
    • 500 MHz: HD2 at –80 dBc, HD3 at –80 dBc
    • 1 GHz: HD2 at –53 dBc, HD3 at –70 dBc
    • 2 GHz: HD2 at –68 dBc, HD3 at –56 dBc
  • Low IMD2, IMD3 distortion
    (1 VPP, 100 Ω, SE-DE, Gv = 17 dB)(1):
    • 500 MHz: IMD2 at –90 dBc, IMD3 at –79 dBc
    • 1 GHz: IMD2 at –80 dBc, IMD3 at –61 dBc
    • 2 GHz: IMD2 at –64 dBc, IMD3 at –42 dBc
  • High OIP2, OIP3. Gp = 8 dB(1)
    • 500 MHz: OIP2 at 91 dBm, OIP3 at 47.7 dBm
    • 1 GHz: OIP2 at 80 dBm, OIP3 at 37.5 dBm
  • Input voltage noise: 1.25 nV/√Hz
  • Input current noise: 3.5 pA/√Hz
  • Supports single- and dual-supply operation
  • Current consumption: 60 mA
  • Power-down feature (1)
    • 1. Power Gain (Gp) = 8 dB; Voltage Gain (Gv) = 17 dB; RLtotal = 200 Ω. See Output Reference Nodes and Gain Nomenclature section for more details.