LMK00304 3-GHz 4-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator

1 Features

3:1 Input Multiplexer
- Two Universal Inputs Operate up to 3.1 GHz and Accept LVPECL, LVDS, CML, SSTL, HSTL, HCSL, or Single-Ended Clocks
- One Crystal Input Accepts a 10-MHz to 40-MHz Crystal or Single-Ended Clock
Two Banks With 2 Differential Outputs Each
- LVPECL, LVDS, HCSL, or Hi-Z (Selectable)
- LVPECL Additive Jitter with LMK03806 Clock Source at 156.25 MHz:
  - 20 fs RMS (10 kHz to 1 MHz)
  - 51 fs RMS (12 kHz to 20 MHz)
High PSRR: –65 / –76 dBc (LVPECL/LVDS) at 156.25 MHz
LVCMOS Output with Synchronous Enable Input
Pin-Controlled Configuration
V_CC Core Supply: 3.3 V ± 5%
3 Independent V_CCO Output Supplies: 3.3 V/2.5 V ± 5%
Industrial Temperature Range: –40°C to +85°C
32-lead WQFN (5 mm × 5 mm)