LMX1906-SP Space Grade Low-Noise, High-Frequency JESD204B/C Buffer, Multiplier and Divider

1 Features

SMD #5962-23202
- Total ionizing dose 100 krad (ELDRS-free)
- Single event latch-up (SEL) immune up to 87 MeV - cm² /mg
- Single event functional interrupt (SEFI) immune up to 87 MeV - cm² /mg
Clock buffer for 300-MHz to 15-GHz frequency
Ultra-Low Noise
- Noise floor of –159 dBc/Hz at 6-GHz output
- 36-fs additive jitter (100 Hz to f_CLK) at 6-GHz output
- 5-fs additive jitter (100 Hz - 100 MHz)
4 high-frequency clocks with corresponding SYSREF outputs
- Shared divide by 1 (Buffer), 2, 3, 4, 5, 6, 7, and 8
- Shared programmable multiplier x2, x3, and x4
Support pin mode options to configure the device without SPI
LOGICLK output with corresponding SYSREF output
- On separate divide bank
- 1, 2, 4 pre-divider
- 1 (bypass), 2, …, 1023 post divider
8 programmable output power levels
Synchronized SYSREF clock outputs
- 508 delay step adjustments of less than 2.5 ps each at 12.8 GHz
- Generator and repeater modes
- Windowing feature for SYSREFREQ pins to optimize timing
SYNC feature to all divides and multiple devices
2.5-V operating voltage
–55ºC to +125ºC operating temperature