Refer to the PDF data sheet for device specific package drawings
High push-pull output drive strength:
The SN74LVC2G101-Q1 contains two independent D-type flip-flops. Each channel has data (D), clear (CLR), and clock (CLKA, CLKB, CLKC, CLKD) inputs and a non-inverted output (Q). The clock inputs can be configured for use in a wide variety of applications, allowing for configuration as 2-input AND, OR, NAND, NOR, XOR, XNOR, as well as 1-input inverted or non-inverted operation. All inputs include Schmitt-trigger architecture.
PART NUMBER(1) | PACKAGE | PACKAGE SIZE(2) | BODY SIZE (NOM)(3) |
---|---|---|---|
SN74LVC2G101-Q1 | BQB (WQFN, 16) | 3.5mm × 2.5mm | 3.5mm × 2.5mm |
PW (TSSOP, 16)(4) | 5mm × 6.4mm | 5mm × 4.4mm |
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
CLR1 | 1 | I | Channel 1, clear, active low |
CLKA1 | 2 | I | Channel 1, clock input A |
CLKB1 | 3 | I | Channel 1, clock input B |
CLKC1 | 4 | I | Channel 1, clock input C |
CLKD1 | 5 | I | Channel 1, clock input D |
Q1 | 6 | O | Channel 1, non-inverted output |
D1 | 7 | I | Channel 1, data input |
GND | 8 | G | Ground |
D2 | 9 | I | Channel 2, data input |
Q2 | 10 | O | Channel 2, non-inverted output |
CLKD2 | 11 | I | Channel 2, clock input D |
CLKC2 | 12 | I | Channel 2, clock input C |
CLKB2 | 13 | I | Channel 2, clock input B |
CLKA2 | 14 | I | Channel 2, clock input A |
CLR2 | 15 | I | Channel 2, clear, active low |
VCC | 16 | P | Positive supply |
Thermal Pad(2) | — | The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply. |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VCC | Supply voltage range | -0.5 | 6.5 | V | |
VI | Input voltage range(2) | -0.5 | 6.5 | V | |
VO | Output voltage range(2) | -0.5 | VCC + 0.5 | V | |
IIK | Input clamp current | VI < 0V | -50 | mA | |
IOK | Output clamp current | VO < 0V | -50 | mA | |
IO | Continuous output current | ±50 | mA | ||
Continuous current through VCC or GND | ±100 | mA | |||
TJ | Junction temperature | 150 | °C | ||
Tstg | Storage temperature | -65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per AEC Q100-002 HBM ESD Classification Level 2(1) | ±2000 | V |
Charged device model (CDM), per AEC Q100-011 CDM ESD Classification Level C4B | ±1000 |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VCC | Supply voltage | Operating | 1.1 | 3.6 | V |
VI | Input voltage | 0 | 5.5 | V | |
VO | Output voltage | High or low state | 0 | VCC | V |
IOH | High-level output current | VCC = 1.8V | -4 | mA | |
VCC = 2.3V | -8 | ||||
VCC = 2.7V | -12 | ||||
VCC = 3V | -24 | ||||
IOL | Low-level output current | VCC = 1.8V | 4 | mA | |
VCC = 2.3V | 8 | ||||
VCC = 2.7V | 12 | ||||
VCC = 3V | 24 | ||||
Δt/Δv | Input transition rise or fall rate | 10 | ns/V | ||
TA | Operating free-air temperature | -40 | 125 | °C |