SLVSCO0E
June 2014 – October 2020
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Switching Characteristics
7.7
Typical DC Characteristics
7.8
Typical AC Characteristics (TPS22914B/15B)
7.9
Typical AC Characteristics (TPS22914C/15C)
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
On and Off Control
9.3.2
Input Capacitor (CIN)
9.3.3
Output Capacitor (CL)
9.4
Device Functional Modes
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
VIN to VOUT Voltage Drop
10.2.2.2
Inrush Current
10.2.3
Application Curves
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.1.1
Thermal Considerations
12.2
Layout Example
13
Device and Documentation Support
13.1
Documentation Support
13.1.1
Related Documentation
13.2
Related Links
13.3
Receiving Notification of Documentation Updates
13.4
Support Resources
13.5
Trademarks
13.6
Electrostatic Discharge Caution
13.7
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
YFP|4
MXBG055R
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsco0e_oa
slvsco0e_pm
1
Features
Integrated Single Channel Load Switch
Input Voltage Range: 1.05 V to 5.5 V
Low On-Resistance (R
ON
)
R
ON
= 37 mΩ (Typical) at V
IN
= 5 V
R
ON
= 38 mΩ (Typical) at V
IN
= 3.3 V
R
ON
= 43 mΩ (Typical) at V
IN
= 1.8 V
2-A Maximum Continuous Switch Current
Low Quiescent Current
7.7 µA (Typical) at V
IN
= 3.3 V
Low Control Input Threshold Enables Use of 1 V or Higher GPIO
Controlled Slew Rate
t
R
(TPS22914B/15B) = 64 µs at V
IN
= 3.3 V
t
R
(TPS22914C/15C) = 913 µs at V
IN
= 3.3 V
Quick Output Discharge (TPS22915 only)
Ultra-Small Wafer-Chip-Scale Package
0.78 mm × 0.78 mm, 0.4-mm Pitch,
0.5-mm Height (YFP)
ESD Performance Tested per JESD 22
2-kV HBM and 1-kV CDM