SLUSBA6B December   2012  – October 2015 TPS51604

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
    7. 6.7 Typical Power Block MOSFET Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 UVLO Protection
      2. 7.3.2 PWM Pin
      3. 7.3.3 SKIP Pin
        1. 7.3.3.1 Zero Crossing (ZX) Operation
      4. 7.3.4 Adaptive Dead-Time Control and Shoot-Through Protection
      5. 7.3.5 Integrated Boost-Switch
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Step 1: Select the Input (VDD) Capacitor
        2. 8.2.2.2 Step 2: Select Boot Capacitor and Boot Resistor
        3. 8.2.2.3 Step 3: Establish Connection Between TPS51604 and Controller
        4. 8.2.2.4 Step 4: Establish Connection Between TPS51604 and the Power Block
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Reduced Dead-Time Drive Circuit for Optimized CCM
  • Automatic Zero Crossing Detection for Optimized DCM Efficiency
  • Multiple Low-Power Modes for Optimized Light-Load Efficiency
  • Optimized Signal Path Delays for High-Frequency Operation
  • Integrated BST Switch Drive Strength Optimized for Ultrabook FETs
  • Optimized for 5-V FET Drive
  • Conversion Input Voltage Range (VIN): 4.5 to 28 V
  • 2-mm × 2-mm, 8-Pin, WSON Thermal Pad Package

2 Applications

  • Tablets Using High-Frequency CPUs With the Following Power Input:
    • Adapter
    • Battery
    • NVDC
    • 5-V or 12-V Rails

3 Description

The TPS51604 drivers are optimized for high-frequency CPU VCORE applications. Advanced features such as reduced dead-time drive and auto zero crossing are used to optimize efficiency over the entire load range.

The SKIP pin provides the option of CCM operation to support controlled management of the output voltage. In addition, the TPS51604 supports two low-power modes. With the PWM input in tri-state, quiescent current is reduced to 130 µA, with immediate response. When SKIP is held at tri-state, the current is reduced to 8 µA (typically 20 µs is required to resume switching). Paired with the appropriate TI controller, the drivers deliver an exceptionally high performance power supply system.

The TPS51604 device is packaged in a space saving, thermally-enhanced 8-pin, 2-mm x 2-mm WSON package and operates from –40°C to 105°C.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS51604 WSON (8) 2.00 mm × 2.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

TPS51604 v12234_lusba6.gif