The TPS61175 device is a monolithic switching regulator with integrated 3-A, 40-V power switch. The device can be configured in several standard switching-regulator topologies, including boost, SEPIC, and flyback. The device has a wide input voltage range to support application with input voltage from multicell batteries or regulated 5-V, 12-V power rails.
The TPS61175 regulates the output voltage with current mode pulse width modulation (PWM) control. The switching frequency of PWM is set by either an external resistor or an external clock signal. The user can program the switching frequency from 200 kHz to 2.2 MHz.
The device features a programmable soft-start function to limit inrush current during start-up, and has other built-in protection features, such as pulse-by-pulse overcurrent limit and thermal shutdown. The TPS61175 is available in 14-pin HTSSOP package with PowerPad.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPS61175 | HTSSOP (14) | 5.00 mm × 4.40 mm |
Changes from E Revision (February 2019) to F Revision
Changes from D Revision (April 2016) to E Revision
Changes from C Revision (August 2014) to D Revision
Changes from B Revision (February 2012) to C Revision
Changes from A Revision (October 2010) to B Revision
Changes from * Revision (December 2008) to A Revision
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
AGND | 7 | I | Signal ground of the IC |
COMP | 8 | O | Output of the internal transconductance error amplifier. An external RC network is connected to this pin to compensate the regulator. |
EN | 4 | I | Enable pin. When the voltage of this pin falls below the enable threshold for more than 10ms, the IC turns off. |
FB | 9 | I | Feedback pin for positive voltage regulation. Connect to the center tap of a resistor divider to program the output voltage. |
FREQ | 10 | O | Switch frequency program pin. An external resistor is connected to this pin to set switch frequency. See application section for information on how to size the FREQ resistor. |
NC | 11 | I | Reserved pin. Must connect this pin to ground. |
PGND | 12,13,14 | I | Power ground of the IC. It is connected to the source of the PWM switch. |
SS | 5 | O | Soft start programming pin. A capacitor between the SS pin and GND pin programs soft start timing. See Application and Implementation for information on how to size the SS capacitor. |
SW | 1,2 | I | This is the switching node of the IC. Connect SW to the switched side of the inductor. |
SYNC | 6 | I | Switch frequency synchronous pin. Customers can use an external signal to set the IC switch frequency between 200-kHz and 2.2-MHz. If not used, this pin should be tied to AGND as short as possible to avoid noise coupling. |
Thermal Pad | The thermal pad should be soldered to the analog ground. If possible, use thermal via to connect to top and internal ground plane layers for ideal power dissipation. | ||
VIN | 3 | I | The input supply pin for the IC. Connect VIN to a supply voltage between 2.9 V and 18 V. It is acceptable for the voltage on the pin to be different from the boost power stage input for applications requiring voltage beyond VIN range. |
MIN | MAX | UNIT | |
---|---|---|---|
Supply voltages on pin VIN(2) | –0.3 | 20 | V |
Voltages on pins EN(2) | –0.3 | 20 | V |
Voltage on pin FB, FREQ and COMP(2) | –0.3 | 3 | V |
Voltage on pin SYNC, SS(2) | –0.3 | 7 | V |
Voltage on pin SW(2) | –0.3 | 40 | V |
Continuous power dissipation | See Thermal Information | ||
Operating junction temperature range | –40 | 150 | °C |
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VIN | Input voltage | 2.9 | 18 | V | |
VO | Output voltage | VIN | 38 | V | |
L | Inductor(1) | 4.7 | 47 | μH | |
fSW | Switching frequency | 200 | 2200 | kHz | |
CI | Input capacitor | 4.7 | μF | ||
CO | Output capacitor | 4.7 | μF | ||
VSYN | External switching frequency logic | 5 | V | ||
TA | Operating ambient temperature | –40 | 85 | °C | |
TJ | Operating junction temperature | –40 | 125 | °C |
THERMAL METRIC(1) | TPS61175 | UNIT | |
---|---|---|---|
PWP (HTSSOP) | |||
14 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 45.2 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 34.9 | °C/W |
RθJB | Junction-to-board thermal resistance | 30.1 | °C/W |
ψJT | Junction-to-top characterization parameter | 1.5 | °C/W |
ψJB | Junction-to-board characterization parameter | 29.9 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 5.8 | °C/W |