Loading [MathJax]/jax/output/SVG/fonts/TeX/fontdata.js
DATA SHEET
TPS650250 Power Management IC (PMIC) for SoCs and Multirail Subsystems
1 Features
- 1.6 A, 97% Efficient Step-Down Converter for System Voltage (VDCDC1)
- 3.3 V, 2.8 V, or Adjustable
- 0.8 A, up to 95% Efficient Step-Down Converter for Memory Voltage (VDCDC2)
- 1.8 V, 2.5 V, or Adjustable
- 0.8 A, 90% Efficient Step-Down Converter for Processor Core (VDCDC3)
- Adjustable Output Voltage on VDCDC3
- 30-mA LDO for Vdd_alive
- 2 × 200 mA General-Purpose LDOs (LDO1 and LDO2)
- Dynamic Voltage Management for Processor Core
- LDO1 and LDO2 Voltage Externally Adjustable
- Separate Enable Pins for Inductive Converters
- 2.25-MHz Switching Frequency
- 85-μA Quiescent Current
- Thermal Shutdown Protection