SBVS179B December   2011  – August 2015 TPS7A8101

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Start-Up
      4. 7.3.4 Undervoltage Lock-Out (UVLO)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Recommended Component Values
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Dropout Voltage
        2. 8.2.1.2 Minimum Load
        3. 8.2.1.3 Input and Output Capacitor Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Noise
        2. 8.2.2.2 Transient Response
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
    2. 10.2 Layout Example
    3. 10.3 Thermal Protection
    4. 10.4 Power Dissipation
    5. 10.5 Estimating Junction Temperature
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Low-Dropout 1-A Regulator with Enable
  • Adjustable Output Voltage: 0.8 V to 6 V
  • Wide-Bandwidth High PSRR:
    • 80 dB at 1 kHz
    • 60 dB at 100 kHz
    • 54 dB at 1 MHz
  • Low Noise: 23.5 μVRMS typical (100 Hz to
    100 kHz)
  • Stable with a 4.7-μF Capacitance
  • Excellent Load and Line Transient Response
  • 3% Overall Accuracy (Over Load, Line, Temperature)
  • Overcurrent and Overtemperature Protection
  • Very Low Dropout: 170 mV Typical at 1 A
  • Package: 3-mm × 3-mm SON-8

2 Applications

  • Telecom Infrastructure
  • Audio
  • High-Speed I/F (PLL and VCO)

3 Description

The TPS7A8101 low-dropout linear regulator (LDO) offers very good performance in noise and power-supply rejection ratio (PSRR) at the output. This LDO uses an advanced BiCMOS process and a PMOSFET pass device to achieve very low noise, excellent transient response, and excellent PSRR performance.

The TPS7A8101 device is stable with a 4.7-μF ceramic output capacitor, and uses a precision voltage reference and feedback loop to achieve a worst-case accuracy of 3% over all load, line, process, and temperature variations.

This device is fully specified over the temperature range of TJ = –40°C to 125°C and is offered in a 3-mm × 3-mm, SON-8 package with a thermal pad.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS7A8101 SON (8) 3.00 mm × 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Circuit

TPS7A8101 pg1_fbd_bvs179.gif