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  • UCC2752x Dual 5-A High-Speed Low-Side Gate Driver Based on CMOS Input Threshold Logic

    • SLUSBD0E June   2013  – December 2014 UCC27527 , UCC27528

      PRODUCTION DATA.  

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  • UCC2752x Dual 5-A High-Speed Low-Side Gate Driver Based on CMOS Input Threshold Logic
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 VDD and Undervoltage Lockout
      2. 8.3.2 Operating Supply Current
      3. 8.3.3 Input Stage
      4. 8.3.4 Enable Function
      5. 8.3.5 Output Stage
      6. 8.3.6 Low Propagation Delays and Tightly Matched Outputs
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input-to-Output Logic
        2. 9.2.2.2 Enable and Disable Function
        3. 9.2.2.3 VDD Bias Supply Voltage
        4. 9.2.2.4 Propagation Delay
        5. 9.2.2.5 Drive Current and Power Dissipation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
  14. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • D|8
    • MSOI002K
  • DSD|8
    • MPDS238B
Thermal pad, mechanical data (Package|Pins)
  • DSD|8
    • QFND350C
Orderable Information
  • slusbd0e_oa
  • slusbd0e_pm
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DATA SHEET

UCC2752x Dual 5-A High-Speed Low-Side Gate Driver Based on CMOS Input Threshold Logic

1 Features

  • Industry-Standard Pin Out
  • Two Independent Gate-Drive Channels
  • 5-A Peak Source and Sink Drive Current
  • CMOS Input Logic Threshold
    (Function of Supply Voltage on VDD Pins)
  • Hysteretic Logic Thresholds for High Noise Immunity
  • Independent Enable Function for Each Output
  • Inputs and Enable Pin Voltage Levels Not Restricted by VDD Pin Bias Supply Voltage
  • 4.5-V to 18-V Single Supply Range
  • Outputs Held Low During VDD UVLO (Ensures Glitch-Free Operation at Power Up and Power Down)
  • Fast Propagation Delays (17-ns Typical)
  • Fast Rise and Fall Times (7-ns and 6-ns Typical)
  • 1-ns Typical Delay Matching Between 2 Channels
  • Outputs Held in Low When Inputs Floating
  • SOIC-8, and 3-mm x 3-mm WSON-8 Package Options
  • Operating Temperature Range of –40°C to 140°C
  • –5-V Negative Voltage Handling Capability on Input Pins

2 Applications

  • Switch-Mode Power Supplies
  • DC-to-DC Converters
  • Motor Control, Solar Power
  • Gate Drive for Emerging Wideband Gap Power Devices Such as GaN

3 Description

The UCC2752x family of devices are dual-channel, high-speed, low-side gate driver devices capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high-peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay typically 17 ns. In addition, the drivers feature matched internal propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. The input pin thresholds are based on CMOS logic, which is a function of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity. The Enable pins are based on TTL and CMOS compatible logic, independent of VDD supply voltage.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
UCC27527 WSON (8) 3.00 mm x 3.00 mm
SOIC (8) 4.90 mm x 3.91 mm
UCC27528 WSON (8) 3.00 mm x 3.00 mm
SOIC (8) 4.90 mm x 3.91 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.
UCC27527 UCC27528 matrix_lusbd0.gif

4 Revision History

Changes from D Revision (July 2013) to E Revision

  • Added Handling Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go

Changes from C Revision (June 2013) to D Revision

  • Added OUTA, OUTB voltage field and values.Go
  • Changed table note from "Values are verified by characterization and are not production tested." to "Values are verified by characterization on bench."Go
  • Changed Bias Current TYP values from 170 µA to 180 µA.Go

Changes from B Revision (January 2013) to C Revision

  • Changed UCC27527 packaging optionsGo
  • Added UCC27527 Bias Current specifications.Go
  • Added an updated Output Stage section.Go
  • Added UCC2752X Gate Driver Output Structure imageGo
  • Added updated Drive Current and Power Dissipation section.Go
  • Added a PSW... equation.Go

Changes from A Revision (December 2012) to B Revision

  • Changed Feature bullet from "-5-V Negative Voltage Handling Capability on Input and Enable Pins" to -5-V Negative Voltage Handling Capability on Input Pins"Go

Changes from * Revision (December 2012) to A Revision

  • Changed marketing status from Product Preview to Final Go
  • Added note to packaging section, "DSD package is rated MSL level 2" Go
  • Changed ENA, ENB voltage from (-6.5 V to 20) to (-0.3 to 20).Go
  • Changed Enable voltage, ENA and ENB min value from -5 V to 0 V.Go

5 Description (continued)

The UCC27528 is a dual noninverting driver. UCC27527 features a dual input design which offers flexibility of both inverting (IN– pin) and non-inverting (IN+ pin) configuration for each channel. Either IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins of all the devices in UCC2752x family to ensure that outputs are held low when input pins are in floating condition. UCC27528 features Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active high logic and can be left open for standard operation.

6 Pin Configuration and Functions

8-Pin WSON and SOIC
DSD and D Package
Top View
UCC27527 UCC27528 pins_lusbd0.gif

Pin Functions (UCC27527)

PIN I/O DESCRIPTION
NUMBER NAME
1 INA- I Inverting Input to Channel A: when Channel A is used in Non-Inverting configuration connect INA- to GND in order to Enable Channel A output, OUTA held low if INA- is unbiased or floating.
2 INB- I Inverting Input to Channel B: when Channel B is used in Non-Inverting configuration connect INB- to GND in order to Enable Channel B output, OUTB held low if INB- is unbiased or floating.
3 GND – Ground: All signals referenced to this pin.
4 OUTB I Output of Channel B
5 VDD O Bias Supply Input
6 OUTA I Output of Channel A
7 INB+ O Non-Inverting Input to Channel B: When Channel B is used in Inverting configuration connect INB+ to VDD in order to Enable Channel B output, OUTB held low if INB+ is unbiased or floating.
8 INA+ I Non-Inverting Input to Channel A: When Channel A is used in Inverting configuration connect INA+ to VDD in order to Enable Channel A output, OUTA held low if INA+ is unbiased or floating.

Pin Functions (UCC27528)

PIN I/O DESCRIPTION
NUMBER NAME
1 ENA I Enable input for Channel A: ENA biased low Disables Channel A output regardless of INA state, ENA biased high or floating Enables Channel A output, ENA allowed to float.
2 INA I Input to Channel A: Non-Inverting Input in UCC27528, OUTA held low if INA is unbiased or floating.
3 GND – Ground: All signals referenced to this pin.
4 INB I Input to Channel B: Non-Inverting Input in UCC27528, OUTB held low if INB is unbiased or floating.
5 OUTB O Output of Channel B
6 VDD I Bias supply input
7 OUTA O Output of Channel A
8 ENB I Enable input for Channel B: ENB biased low Disables Channel B output regardless of INB state, ENB biased high or floating Enables Channel B output, ENB allowed to float.

 
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