SLUSF42
December 2022
UCC5871-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
6.6
Insulation Specifications
6.7
Safety Limiting Values
6.8
Electrical Characteristics
6.9
SPI Timing Requirements
6.10
Switching Characteristics
6.11
Typical Characteristics
7
Layout
7.1
Layout Guidelines
7.1.1
Component Placement
7.1.2
Grounding Considerations
7.1.3
High-Voltage Considerations
7.1.4
Thermal Considerations
7.2
Layout Example
8
Device and Documentation Support
8.1
Device Support
8.1.1
Third-Party Products Disclaimer
8.2
Documentation Support
8.2.1
Related Documentation
8.3
Receiving Notification of Documentation Updates
8.4
Support Resources
8.5
Trademarks
8.6
Electrostatic Discharge Caution
8.7
Glossary
9
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DWJ|36
MPSS110A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slusf42_oa
slusf42_pm
1
Features
Split output driver provides 30-A peak source and 30-A peak sink currents
Interlock and shoot-through protection with 150-ns(max) propagation delay and programmable minimum pulse rejection
Primary and secondary side active short circuit (ASC) support
Configurable power transistor protections
DESAT based short circuit protection
Shunt resistor based overcurrent and short circuit protection
NTC based overtemperature protection
Programmable soft turnoff (STO) and two-level turnoff (2LTOFF) during power transistor faults
Functional Safety-Compliant
Developed for functional safety applications
Documentation available to aid ISO 26262 system design up to ASIL D
Integrated diagnostics:
Built-in self test (BIST) for protection comparators
IN+ to transistor gate path integrity
Power transistor threshold monitoring
Internal clock monitoring
Fault alarm (nFLT1) and warning (nFLT2) outputs
Integrated 4-A active Miller clamp or optional external drive for Miller clamp transistor
Advanced high voltage clamping control
Internal and external supply undervoltage and overvoltage protection
Active output pulldown and default low outputs with low supply or floating inputs
Driver die temperature sensing and overtemperature protection
100-kV/µs minimum common mode transient immunity (CMTI) at V
CM
= 1000 V
SPI based device reconfiguration, verification, supervision, and diagnosis
Integrated 10-bit ADC for power transistor temperature, voltage, and current monitoring