SCHS402
August 2019 – June 2021
CD54HCT14
,
CD74HCT14
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
Recommended Operating Conditions
6.3
Thermal Information
6.4
Electrical Characteristics
6.5
Switching Characteristics
6.6
Operating Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Balanced CMOS Push-Pull Outputs
8.3.2
TTL-Compatible Schmitt-Trigger CMOS Inputs
8.3.3
Clamp Diode Structure
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Power Considerations
9.2.1.2
Input Considerations
9.2.1.3
Output Considerations
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
N|14
MPDI002C
PW|14
MPDS360A
D|14
MPDS177H
Thermal pad, mechanical data (Package|Pins)
Orderable Information
schs402_oa
schs402_pm
1
Features
LSTTL input logic compatible
V
IL(max)
= 0.8 V, V
IH(min)
= 2 V
CMOS input logic compatible
I
I
≤ 1 µA at V
OL
, V
OH
Buffered inputs
4.5 V to 5.5 V operation
Wide operating temperature range: -55°C to +125°C
Supports fanout up to 10 LSTTL loads
Significant power reduction compared to LSTTL logic ICs