ZHCSDF3D
May 2014 – March 2018
DRV2605L
PRODUCTION DATA.
1
特性
2
应用
3
说明
简化原理图
4
修订历史记录
5
Pin Configuration and Functions
Pin Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Switching Characteristics
6.8
Typical Characteristics
7
Parameter Measurement Information
7.1
Test Setup for Graphs
7.1.1
Default Test Conditions
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Support for ERM and LRA Actuators
8.3.2
Smart-Loop Architecture
8.3.2.1
Auto-Resonance Engine for LRA
8.3.2.2
Real-Time Resonance-Frequency Reporting for LRA
8.3.2.3
Automatic Switch to Open-Loop for LRA
8.3.2.4
Automatic Overdrive and Braking
8.3.2.4.1
Startup Boost
8.3.2.4.2
Brake Factor
8.3.2.4.3
Brake Stabilizer
8.3.2.5
Automatic Level Calibration
8.3.2.5.1
Automatic Compensation for Resistive Losses
8.3.2.5.2
Automatic Back-EMF Normalization
8.3.2.5.3
Calibration Time Adjustment
8.3.2.5.4
Loop-Gain Control
8.3.2.5.5
Back-EMF Gain Control
8.3.2.6
Actuator Diagnostics
8.3.2.7
Automatic Re-Synchronization
8.3.3
Open-Loop Operation for LRA
8.3.4
Open-Loop Operation for ERM
8.3.5
Flexible Front-End Interface
8.3.5.1
PWM Interface
8.3.5.2
Internal Memory Interface
8.3.5.2.1
Waveform Sequencer
8.3.5.2.2
Library Parameterization
8.3.5.3
Real-Time Playback (RTP) Interface
8.3.5.4
Analog Input Interface
8.3.5.5
Audio-to-Vibe Interface
8.3.5.6
Input Trigger Option
8.3.5.6.1
I2C Trigger
8.3.5.6.2
Edge Trigger
8.3.5.6.3
Level Trigger
8.3.5.7
Noise Gate Control
8.3.6
Edge Rate Control
8.3.7
Constant Vibration Strength
8.3.8
Battery Voltage Reporting
8.3.9
One-Time Programmable (OTP) Memory for Configuration
8.3.10
Low-Power Standby
8.3.11
I2C Watchdog Timer
8.3.12
Device Protection
8.3.12.1
Thermal Protection
8.3.12.2
Overcurrent Protection of the Actuator
8.3.12.3
Overcurrent Protection of the Regulator
8.3.12.4
Brownout Protection
8.4
Device Functional Modes
8.4.1
Power States
8.4.1.1
Operation With VDD < 2 V (Minimum VDD)
8.4.1.2
Operation With VDD > 5.5 V (Absolute Maximum VDD)
8.4.1.3
Operation With EN Control
8.4.1.4
Operation With STANDBY Control
8.4.1.5
Operation With DEV_RESET Control
8.4.1.6
Operation in the Active State
8.4.2
Changing Modes of Operation
8.4.3
Operation of the GO Bit
8.4.4
Operation During Exceptional Conditions
8.4.4.1
Operation With No Actuator Attached
8.4.4.2
Operation With a Non-Moving Actuator Attached
8.4.4.3
Operation With a Short at REG Pin
8.4.4.4
Operation With a Short at OUT+, OUT–, or Both
8.5
Programming
8.5.1
Auto-Resonance Engine Programming for the LRA
8.5.1.1
Drive-Time Programming
8.5.1.2
Current-Dissipation Time Programming
8.5.1.3
Blanking Time Programming
8.5.1.4
Zero-Crossing Detect-Time Programming
8.5.2
Automatic-Level Calibration Programming
8.5.2.1
Rated Voltage Programming
8.5.2.2
Overdrive Voltage-Clamp Programming
8.5.3
I2C Interface
8.5.3.1
General I2C Operation
8.5.3.2
Single-Byte and Multiple-Byte Transfers
8.5.3.3
Single-Byte Write
8.5.3.4
Multiple-Byte Write and Incremental Multiple-Byte Write
8.5.3.5
Single-Byte Read
8.5.3.6
Multiple-Byte Read
8.5.4
Programming for Open-Loop Operation
8.5.4.1
Programming for ERM Open-Loop Operation
8.5.4.2
Programming for LRA Open-Loop Operation
8.5.5
Programming for Closed-Loop Operation
8.5.6
Auto Calibration Procedure
8.5.7
Programming On-Chip OTP Memory
8.5.8
Waveform Playback Programming
8.5.8.1
Data Formats for Waveform Playback
8.5.8.1.1
Open-Loop Mode
8.5.8.1.2
Closed-Loop Mode, Unidirectional
8.5.8.1.3
Closed-Loop Mode, Bidirectional
8.5.8.2
Waveform Setup and Playback
8.5.8.2.1
Waveform Playback Using RTP Mode
8.5.8.2.2
Waveform Playback Using the Analog-Input Mode
8.5.8.2.3
Waveform Playback Using PWM Mode
8.5.8.2.4
Waveform Playback Using Audio-to-Vibe Mode
8.5.8.2.5
Waveform Sequencer
8.5.8.2.6
Waveform Triggers
8.6
Register Map
8.6.1
Status (Address: 0x00)
Table 4.
Status Register Field Descriptions
8.6.2
Mode (Address: 0x01)
Table 5.
Mode Register Field Descriptions
8.6.3
Real-Time Playback Input (Address: 0x02)
Table 6.
Real-Time Playback Input Register Field Descriptions
8.6.4
Library Selection (Address: 0x03)
Table 7.
Library Selection Register Field Descriptions
8.6.5
Waveform Sequencer (Address: 0x04 to 0x0B)
Table 8.
Waveform Sequencer Register Field Descriptions
8.6.6
GO (Address: 0x0C)
Table 9.
GO Register Field Descriptions
8.6.7
Overdrive Time Offset (Address: 0x0D)
Table 10.
Overdrive Time Offset Register Field Descriptions
8.6.8
Sustain Time Offset, Positive (Address: 0x0E)
Table 11.
Sustain Time Offset, Positive Register Field Descriptions
8.6.9
Sustain Time Offset, Negative (Address: 0x0F)
Table 12.
Sustain Time Offset, Negative Register Field Descriptions
8.6.10
Brake Time Offset (Address: 0x10)
Table 13.
Brake Time Offset Register Field Descriptions
8.6.11
Audio-to-Vibe Control (Address: 0x11)
Table 14.
Audio-to-Vibe Control Register Field Descriptions
8.6.12
Audio-to-Vibe Minimum Input Level (Address: 0x12)
Table 15.
Audio-to-Vibe Minimum Input Level Register Field Descriptions
8.6.13
Audio-to-Vibe Maximum Input Level (Address: 0x13)
Table 16.
Audio-to-Vibe Maximum Input Level Register Field Descriptions
8.6.14
Audio-to-Vibe Minimum Output Drive (Address: 0x14)
Table 17.
Audio-to-Vibe Minimum Output Drive Register Field Descriptions
8.6.15
Audio-to-Vibe Maximum Output Drive (Address: 0x15)
Table 18.
Audio-to-Vibe Maximum Output Drive Register Field Descriptions
8.6.16
Rated Voltage (Address: 0x16)
Table 19.
Rated Voltage Register Field Descriptions
8.6.17
Overdrive Clamp Voltage (Address: 0x17)
Table 20.
Overdrive Clamp Voltage Register Field Descriptions
8.6.18
Auto-Calibration Compensation Result (Address: 0x18)
Table 21.
Auto-Calibration Compensation-Result Register Field Descriptions
8.6.19
Auto-Calibration Back-EMF Result (Address: 0x19)
Table 22.
Auto-Calibration Back-EMF Result Register Field Descriptions
8.6.20
Feedback Control (Address: 0x1A)
Table 23.
Feedback Control Register Field Descriptions
8.6.21
Control1 (Address: 0x1B)
Table 24.
Control1 Register Field Descriptions
8.6.22
Control2 (Address: 0x1C)
Table 25.
Control2 Register Field Descriptions
8.6.23
Control3 (Address: 0x1D)
Table 26.
Control3 Register Field Descriptions
8.6.24
Control4 (Address: 0x1E)
Table 27.
Control4 Register Field Descriptions
8.6.25
Control5 (Address: 0x1F)
Table 28.
Control5 Register Field Descriptions
8.6.26
LRA Open Loop Period (Address: 0x20)
Table 29.
LRA Open Loop Period Register Field Descriptions
8.6.27
V(BAT) Voltage Monitor (Address: 0x21)
Table 30.
V(BAT) Voltage-Monitor Register Field Descriptions
8.6.28
LRA Resonance Period (Address: 0x22)
Table 31.
LRA Resonance-Period Register Field Descriptions
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Actuator Selection
9.2.2.1.1
Eccentric Rotating-Mass Motors (ERM)
9.2.2.1.2
Linear Resonance Actuators (LRA)
9.2.2.1.2.1
Auto-Resonance Engine for LRA
9.2.2.2
Capacitor Selection
9.2.2.3
Interface Selection
9.2.2.4
Power Supply Selection
9.2.3
Application Curves
9.3
Initialization Setup
9.3.1
Initialization Procedure
9.3.2
Typical Usage Examples
9.3.2.1
Play a Waveform or Waveform Sequence from the ROM Waveform Memory
9.3.2.2
Play a Real-Time Playback (RTP) Waveform
9.3.2.3
Play a PWM or Analog Input Waveform
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Trace Width
11.2
Layout Example
12
器件和文档支持
12.1
器件支持
12.1.1
法律声明
12.1.2
波形库效果列表
12.2
文档支持
12.2.1
相关文档
12.3
接收文档更新通知
12.4
社区资源
12.5
商标
12.6
静电放电警告
12.7
Glossary
13
机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
DGS|10
MPDS035C
YZF|9
MXBG027N
散热焊盘机械数据 (封装 | 引脚)
订购信息
zhcsdf3d_oa
zhcsdf3d_pm
1
特性
灵活的触觉和振动驱动器
LRA(线性谐振致动器)
ERM(偏轴转动惯量)
I
2
C 控制的数字回放引擎
波形序列器和触发器
通过 I
2
C 实现的实时回放模式
I
2
C 双模式驱动(开环和闭环)
智能环路架构(正在申请专利的控制算法)
自动过驱动和制动
自动谐振跟踪和报告(仅限 LRA)
自动致动器诊断
自动级别校准
支持宽泛的致动器型号
许可版与
Immersion TouchSense®
2200 特性:
集成 Immersion 效果库
Audio-to-Vibe
可在电池放电过程进行驱动补偿
宽工作电压范围(2V 至 5.2V)
高效的差分开关输出驱动
脉宽调制 (PWM) 输入,占空比可控范围为 0% 至 100%
硬件触发输入
快速启动时间
1.8V 兼容、V
DD
耐压数字接口