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MSP430i204x、MSP430i203x、MSP430i202x 混合信号微控制器内部版本
ZHCSI49C
September 2014 – March 2021
PRODUCTION DATA
CONTENTS
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MSP430i204x、MSP430i203x、MSP430i202x 混合信号微控制器内部版本
1
特性
2
应用
3
说明
4
Functional Block Diagram
5
Revision History
6
Device Comparison
6.1
Related Products
7
Terminal Configuration and Functions
7.1
Pin Diagrams
7.2
Signal Descriptions
7.3
Pin Multiplexing
7.4
Connection of Unused Pins
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Recommended Operating Conditions
8.4
Active Mode Supply Current (Into VCC) Excluding External Current
8.5
Low-Power Mode Supply Currents (Into VCC) Excluding External Current
8.6
Thermal Resistance Characteristics
8.7
Timing and Switching Characteristics
8.7.1
Reset Timing
8.7.1.1
Reset Timing
8.7.2
Clock Specifications
8.7.2.1
DCO in External Resistor Mode
8.7.2.2
DCO in Internal Resistor Mode
8.7.2.3
DCO Overall Tolerance Table
8.7.2.4
DCO in Bypass Mode Recommended Operating Conditions
8.7.3
Wake-up Characteristics
8.7.3.1
Wake-up Times From Low Power Modes
8.7.4
I/O Ports
8.7.4.1
Schmitt-Trigger Inputs – General-Purpose I/O
8.7.4.2
Inputs – Ports P1 and P2
8.7.4.3
Leakage Current – General-Purpose I/O
8.7.4.4
Outputs – General-Purpose I/O
8.7.4.5
Output Frequency – General-Purpose I/O
8.7.4.6
Typical Characteristics – Outputs
8.7.5
Power Management Module
8.7.5.1
PMM, High-Side Brownout Reset (BORH)
8.7.5.2
PMM, Low-Side SVS (SVSL)
8.7.5.3
PMM, Core Voltage
8.7.5.4
PMM, Voltage Monitor (VMON)
8.7.6
Reference Module
8.7.6.1
Voltage Reference (REF)
8.7.6.2
Temperature Sensor
8.7.7
SD24
8.7.7.1
SD24 Power Supply and Recommended Operating Conditions
8.7.7.2
SD24 Internal Voltage Reference
8.7.7.3
SD24 External Voltage Reference
8.7.7.4
SD24 Input Range
8.7.7.5
SD24 Performance, Internal Reference (SD24REFS = 1, SD24OSRx = 256)
8.7.7.6
SD24 Performance, External Reference (SD24REFS = 0, SD24OSRx = 256)
8.7.7.7
Typical Characteristics
8.7.8
eUSCI
8.7.8.1
eUSCI (UART Mode) Clock Frequency
8.7.8.2
eUSCI (UART Mode) Deglitch Characteristics
8.7.8.3
eUSCI (SPI Master Mode) Clock Frequency
8.7.8.4
eUSCI (SPI Master Mode) Timing
8.7.8.5
eUSCI (SPI Slave Mode) Timing
8.7.8.6
eUSCI (I2C Mode) Timing
8.7.9
Timer_A
8.7.9.1
Timer_A
8.7.10
Flash
8.7.10.1
Flash Memory
8.7.11
Emulation and Debug
8.7.11.1
JTAG and Spy-Bi-Wire Interface
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagrams
9.3
CPU
9.4
Instruction Set
9.5
Operating Modes
9.6
Interrupt Vector Addresses
9.7
Special Function Registers
9.8
Flash Memory
9.9
JTAG Operation
9.9.1
JTAG Standard Interface
9.9.2
Spy-Bi-Wire Interface
9.9.3
JTAG Disable Register
9.10
Peripherals
9.10.1
Clock System
9.10.2
Power-Management Module (PMM)
9.10.3
Digital I/O
9.10.4
Watchdog Timer (WDT)
9.10.5
Timer TA0
9.10.6
Timer TA1
9.10.7
Enhanced Universal Serial Communication Interface (eUSCI)
9.10.8
Hardware Multiplier
9.10.9
SD24
9.11
Input/Output Diagrams
9.11.1
Port P1, P1.0 to P1.3, Input/Output With Schmitt Trigger
9.11.2
Port P1, P1.4 to P1.7, Input/Output With Schmitt Trigger
9.11.3
Port P2, P2.0 to P2.2 and P2.4 to P2.7, Input/Output With Schmitt Trigger
9.11.4
Port P2, P2.3, Input/Output With Schmitt Trigger
9.12
Device Descriptor
9.13
Memory
9.13.1
Peripheral File Map
9.14
Identification
9.14.1
Device Identification
9.14.2
JTAG Identification
10
Applications, Implementation, and Layout
11
Device and Documentation Support
11.1
Getting Started and Next Steps
11.2
Device Nomenclature
11.3
Tools and Software
11.4
Documentation Support
11.5
支持资源
11.6
Trademarks
11.7
静电放电警告
11.8
术语表
12
Mechanical, Packaging, and Orderable Information
重要声明
封装选项
机械数据 (封装 | 引脚)
PW|28
MPDS364
RHB|32
MPQF130D
散热焊盘机械数据 (封装 | 引脚)
RHB|32
QFND257K
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