ZHCSLJ1C
July 2020 – December 2022
ADC3541
,
ADC3542
,
ADC3543
PRODUCTION DATA
1
特性
2
应用
3
说明
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics - Power Consumption
6.6
Electrical Characteristics - DC Specifications
6.7
Electrical Characteristics - AC Specifications ADC3541
6.8
Electrical Characteristics - AC Specifications ADC3542
6.9
Electrical Characteristics - AC Specifications ADC3543
6.10
Timing Requirements
6.11
Typical Characteristics: ADC3541
6.12
Typical Characteristics: ADC3542
6.13
Typical Characteristics: ADC3543
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Analog Input
8.3.1.1
Analog Input Bandwidth
8.3.1.2
Analog Front End Design
8.3.1.2.1
Sampling Glitch Filter Design
8.3.1.2.2
Single Ended Input
8.3.1.2.3
Analog Input Termination and DC Bias
8.3.1.2.3.1
AC-Coupling
8.3.1.2.3.2
DC-Coupling
8.3.1.3
Auto-Zero Feature
8.3.2
Clock Input
8.3.2.1
Single Ended vs Differential Clock Input
8.3.2.2
Signal Acquisition Time Adjust
8.3.3
Voltage Reference
8.3.3.1
Internal voltage reference
8.3.3.2
External voltage reference (VREF)
8.3.3.3
External voltage reference with internal buffer (REFBUF)
8.3.4
Digital Down Converter
8.3.4.1
Digital Filter Operation
8.3.4.2
FS/4 Mixing with Real Output
8.3.4.3
Numerically Controlled Oscillator (NCO) and Digital Mixer
8.3.4.4
Decimation Filter
8.3.4.5
SYNC
8.3.4.6
Output Formatting with Decimation
8.3.4.6.1
Parallel CMOS
8.3.4.6.2
Serialized CMOS Interface
8.3.5
Digital Interface
8.3.5.1
Parallel CMOS Output
8.3.5.2
Serialized CMOS output
8.3.5.2.1
SDR Output Clocking
8.3.5.3
Output Data Format
8.3.5.4
Output Formatter
8.3.5.5
Output Bit Mapper
8.3.5.6
Output Interface/Mode Configuration
8.3.5.6.1
Configuration Example
8.3.6
Test Pattern
8.4
Device Functional Modes
8.4.1
Normal operation
8.4.2
Power Down Options
8.5
Programming
8.5.1
Configuration using PINs only
8.5.2
Configuration Using the SPI Interface
8.5.2.1
Register Write
8.5.2.2
Register Read
8.6
Register Map
8.6.1
Detailed Register Description
9
Application Information Disclaimer
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Input Signal Path
9.2.2.2
Sampling Clock
9.2.2.3
Voltage Reference
9.2.3
Application Curves
9.3
Initialization Set Up
9.3.1
Register Initialization During Operation
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
支持资源
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
术语表
13
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
RSB|40
MPQF185C
散热焊盘机械数据 (封装 | 引脚)
RSB|40
QFND255H
订购信息
zhcslj1c_oa
zhcslj1c_pm
1
特性
14 位 10/25/65 MSPS ADC
本底噪声:–155 dBFS/Hz
超低功耗,具备优化的功耗调节:
35 mW (10 MSPS) 至 84 mW (65 MSPS)
延迟:1 个时钟周期
INL:±0.6 LSB;DNL:±0.1 LSB
基准:外部或内部
输入带宽:900 MHz (3dB)
工业温度范围:-40°C 至 +105°C
片上数字滤波器(可选)
2 倍、4 倍、8 倍、16 倍、32 倍抽取率
32 位 NCO
SDR/DDR 和串行 CMOS 接口
小尺寸: 40 引脚 WQFN (5mm × 5mm) 封装
1.8V 单电源
性能规格 (f
IN
= 10 MHz):
SNR:79.0 dBFS
SFDR:87 dBc HD2、HD3
SFDR:99 dBFS 最严重毛刺
频谱性能 (f
IN
= 64 MHz):
SNR:78.0 dBFS
SFDR:70 dBc HD2、HD3
SFDR:91 dBFS 最严重毛刺