ZHCSK26E March   2017  – July 2022 LMH1297

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 说明（续）
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Recommended SMBus Interface Timing Specifications
    7. 7.7 Serial Parallel Interface (SPI) Timing Specifications
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  4-Level Input Pins and Thresholds
      2. 8.3.2  Equalizer (EQ) and Cable Driver (CD) Mode Control
        1. 8.3.2.1 EQ/CD_SEL Control
        2. 8.3.2.2 OUT0_SEL and SDI_OUT_SEL Control
      3. 8.3.3  Input Carrier Detect
      4. 8.3.4  –6-dB Splitter Mode Launch Amplitude for SDI_IO+ (EQ Mode Only)
      5. 8.3.5  Continuous Time Linear Equalizer (CTLE)
        1. 8.3.5.1 Line-Side Adaptive Cable Equalizer (SDI_IO+ in EQ mode)
        2. 8.3.5.2 Host-Side Adaptive PCB Trace Equalizer (IN0± in CD Mode)
      6. 8.3.6  Clock and Data (CDR) Recovery
      7. 8.3.7  Internal Eye Opening Monitor (EOM)
      8. 8.3.8  Output Function Control
      9. 8.3.9  Output Driver Control
        1. 8.3.9.1 Line-Side Output Cable Driver (SDI_IO+ in CD mode, SDI_OUT+ in EQ or CD mode)
          1. 8.3.9.1.1 Output Amplitude (VOD)
          2. 8.3.9.1.2 Output Pre-Emphasis
          3. 8.3.9.1.3 Output Slew Rate
          4. 8.3.9.1.4 Output Polarity Inversion
        2. 8.3.9.2 Host-Side 100-Ω Output Driver (OUT0± in EQ or CD mode)
      10. 8.3.10 Status Indicators and Interrupts
        1. 8.3.10.1 LOCK_N (Lock Indicator)
        2. 8.3.10.2 CD_N (Carrier Detect)
        3. 8.3.10.3 INT_N (Interrupt)
      11. 8.3.11 Additional Programmability
        1. 8.3.11.1 Cable EQ Index (CEI)
        2. 8.3.11.2 Digital MUTEREF
    4. 8.4 Device Functional Modes
      1. 8.4.1 System Management Bus (SMBus) Mode
        1. 8.4.1.1 SMBus Read and Write Transaction
          1. 8.4.1.1.1 SMBus Write Operation Format
          2. 8.4.1.1.2 SMBus Read Operation Format
      2. 8.4.2 Serial Peripheral Interface (SPI) Mode
        1. 8.4.2.1 SPI Read and Write Transactions
        2. 8.4.2.2 SPI Write Transaction Format
        3. 8.4.2.3 SPI Read Transaction Format
        4. 8.4.2.4 SPI Daisy Chain
    5. 8.5 Register Maps
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 SMPTE Requirements and Specifications
      2. 9.1.2 Low-Power Optimization in CD Mode
      3. 9.1.3 Optimized Loop Bandwidth Settings for Arria 10 FPGA Applications
    2. 9.2 Typical Applications
      1. 9.2.1 Bidirectional I/O
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Cable Equalizer With Loop-Through
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Board Stack-Up and Ground References
      2. 11.1.2 High-Speed PCB Trace Routing and Coupling
        1. 11.1.2.1 SDI_IO± and SDI_OUT±:
        2. 11.1.2.2 IN0± and OUT0±:
      3. 11.1.3 Anti-Pads
      4. 11.1.4 BNC Connector Layout and Routing
      5. 11.1.5 Power Supply and Ground Connections
      6. 11.1.6 Footprint Recommendations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information

1 特性

  • 带有集成时钟恢复器的用户可配置型自适应电缆均衡器或电缆驱动器
  • 支持ST-2082-1 (12G)、ST-2081-1 (6G)、
    ST-424 (3G)、ST-292 (HD) 和 ST-259 (SD)
  • 兼容 DVB-ASI 和 AES10 (MADI)
  • 集成时钟恢复器锁定为 11.88Gbps、5.94Gbps、2.97Gbps、1.485Gbps 或 1.001 分频子速率和 270Mbps 的 SMPTE 速率
  • 片上 75Ω 终端和回损补偿网络
  • EQ（均衡器）模式：
    • 带有集成时钟恢复器的自适应电缆均衡器
    • 具有去加重功能的 100Ω 输出驱动器
    • 时钟恢复型 75Ω 环通输出
    • EQ 模式电缆传输距离
      （Belden 1694A，禁用 SDI_OUT）：
      • 11.88Gbps 时为 75m
      • 5.94Gbps 时为 120m
      • 2.97Gbps 时为 200m
      • 1.485Gbps 时为 300m
      • 270Mbps 时为 600m
  • 电缆驱动器 (CD) 模式：
    • 带有集成时钟恢复器的双路差分输出电缆驱动器
    • 自适应 PCB 输入均衡器
    • 时钟恢复型 100Ω 环回输出
  • 75Ω 输出端的自动预加重和转换率控制
  • 75Ω 和 100Ω 输出端的极性反转
  • 没有输入信号时自动进入省电工作模式
    • 功耗：25 mW（典型值）
  • 通过 ENABLE 引脚进行断电控制
  • 2.5V 单电源
    • EQ 模式功率耗散：275 mW（典型值）
    • CD 模式功率耗散：305 mW（典型值）
  • 可通过引脚、SPI 或 SMBus 接口进行编程
  • 工作温度范围：-40°C 至 +85°C
  • 5mm × 5 mm、32 引脚 QFN 封装