ZHCSNK4A
October 2019 – February 2021
MSP430F5438A-ET
PRODUCTION DATA
1
特性
2
应用
3
说明
4
功能方框图
5
Revision History
6
Terminal Configuration and Functions
6.1
Pin Diagram
6.2
Signal Descriptions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
Recommended Operating Conditions
7.3
Active Mode Supply Current Into VCC Excluding External Current
7.4
Low-Power Mode Supply Currents (Into VCC) Excluding External Current
7.5
Thermal Resistance Characteristics
7.6
Schmitt-Trigger Inputs – General Purpose I/O
7.7
Inputs – Ports P1 and P2
7.8
Leakage Current – General Purpose I/O
7.9
Outputs – General Purpose I/O (Full Drive Strength)
7.10
Outputs – General Purpose I/O (Reduced Drive Strength)
7.11
Output Frequency – General Purpose I/O
7.12
Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.y = 0)
7.13
Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1)
7.14
Crystal Oscillator, XT1, Low-Frequency Mode
7.15
Crystal Oscillator, XT1, High-Frequency Mode
7.16
Crystal Oscillator, XT2
7.17
Internal Very-Low-Power Low-Frequency Oscillator (VLO)
7.18
Internal Reference, Low-Frequency Oscillator (REFO)
7.19
DCO Frequency
7.20
PMM, Brownout Reset (BOR)
7.21
PMM, Core Voltage
7.22
PMM, SVS High Side
7.23
PMM, SVM High Side
7.24
PMM, SVS Low Side
7.25
PMM, SVM Low Side
7.26
Wakeup From Low-Power Modes and Reset
7.27
Timer_A
7.28
Timer_B
7.29
USCI (UART Mode) Recommended Operating Conditions
7.30
USCI (UART Mode)
7.31
USCI (SPI Master Mode) Recommended Operating Conditions
7.32
USCI (SPI Master Mode)
7.33
USCI (SPI Slave Mode)
7.34
USCI (I2C Mode)
7.35
12-Bit ADC, Power Supply and Input Range Conditions
7.36
12-Bit ADC, Timing Parameters
7.37
12-Bit ADC, Linearity Parameters Using an External Reference Voltage or AVCC as Reference Voltage
7.38
12-Bit ADC, Linearity Parameters Using the Internal Reference Voltage
7.39
12-Bit ADC, Temperature Sensor and Built-In VMID
7.40
REF, External Reference
7.41
REF, Built-In Reference
7.42
Flash Memory
7.43
JTAG and Spy-Bi-Wire Interface
8
Detailed Description
8.1
CPU
8.2
Operating Modes
8.3
Interrupt Vector Addresses
8.4
Memory Organization
8.5
Bootloader (BSL)
8.6
JTAG Operation
8.6.1
JTAG Standard Interface
8.6.2
Spy-Bi-Wire Interface
8.7
Flash Memory
8.8
RAM Memory
8.9
Peripherals
8.9.1
Digital I/O
8.9.2
Oscillator and System Clock
8.9.3
Power Management Module (PMM)
8.9.4
Hardware Multiplier (MPY)
8.9.5
Real-Time Clock (RTC_A)
8.9.6
Watchdog Timer (WDT_A)
8.9.7
System Module (SYS)
8.9.8
DMA Controller
8.9.9
Universal Serial Communication Interface (USCI)
8.9.10
TA0
8.9.11
TA1
8.9.12
TB0
8.9.13
ADC12_A
8.9.14
CRC16
8.9.15
REF Voltage Reference
8.9.16
Embedded Emulation Module (EEM) (L Version)
8.9.17
Peripheral File Map
8.9.18
Input/Output Diagrams
8.9.18.1
Port P1, P1.0 to P1.7, Input/Output With Schmitt Trigger
8.9.18.2
Port P2, P2.0 to P2.7, Input/Output With Schmitt Trigger
8.9.18.3
Port P3, P3.0 to P3.7, Input/Output With Schmitt Trigger
8.9.18.4
Port P4, P4.0 to P4.7, Input/Output With Schmitt Trigger
8.9.18.5
Port P5, P5.0 and P5.1, Input/Output With Schmitt Trigger
8.9.18.6
Port P5, P5.2, Input/Output With Schmitt Trigger
8.9.18.7
Port P5, P5.3, Input/Output With Schmitt Trigger
8.9.18.8
Port P5, P5.4 to P5.7, Input/Output With Schmitt Trigger
8.9.18.9
Port P6, P6.0 to P6.7, Input/Output With Schmitt Trigger
8.9.18.10
Port P7, P7.0, Input/Output With Schmitt Trigger
8.9.18.11
Port P7, P7.1, Input/Output With Schmitt Trigger
8.9.18.12
Port P7, P7.2 and P7.3, Input/Output With Schmitt Trigger
8.9.18.13
Port P7, P7.4 to P7.7, Input/Output With Schmitt Trigger
8.9.18.14
Port P8, P8.0 to P8.7, Input/Output With Schmitt Trigger
8.9.18.15
Port P9, P9.0 to P9.7, Input/Output With Schmitt Trigger
8.9.18.16
Port P10, P10.0 to P10.7, Input/Output With Schmitt Trigger
8.9.18.17
Port P11, P11.0 to P11.2, Input/Output With Schmitt Trigger
8.9.18.18
Port J, J.0 JTAG Pin TDO, Input/Output With Schmitt Trigger or Output
8.9.18.19
Port J, J.1 to J.3 JTAG Pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
8.10
Device Descriptors (TLV)
9
Device and Documentation Support
9.1
Trademarks
9.2
静电放电警告
9.3
支持资源
9.4
术语表
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
GCA|113
MPBGAT8
ZCA|113
MPBGAJ3A
散热焊盘机械数据 (封装 | 引脚)
订购信息
zhcsnk4a_oa
zhcsnk4a_pm
1
特性
工作温度版本 -ET 使用器件版本
H
低电源电压范围:
3.6V 低至 1.8V
超低功耗
激活模式 (AM):
所有系统时钟激活
在 8MHz、3.0V 且闪存程序执行时为 230µA/MHz(典型值)
在 8MHz、3.0V 且 RAM 程序执行时为 110µA/MHz(典型值)
待机模式 (LPM3):
含晶体的实时时钟、看门狗、电源监控器可用、完全 RAM 保持、快速唤醒:
2.2V 时为 1.7µA,3.0V 时为 2.1µA(典型值)
低功耗振荡器 (VLO),通用计数器,看门狗和电源监控器可用,完全 RAM 保持,快速唤醒:
3.0V 时为 1.2µA(典型值)
关闭模式 (LPM4):
完全 RAM 保持、电源监控器可用、快速唤醒:
3.0V 时为 1.2µA(典型值)
关断模式 (LPM4.5):
3.0V 时为 0.1µA(典型值)
3.5µs 内从待机模式唤醒(典型值)
16 位 RISC 架构
扩展存储器
高达 25MHz 系统时钟
灵活的电源管理系统
具有可编程稳压内核电源电压的完全集成 LDO
电源电压监控、监视和欠压保护
单一时钟系统
针对频率稳定的锁相环 (FLL) 控制环路
低功耗低频内部时钟源 (VLO)
低频修整内部基准源 (REFO)
32kHz 晶振
高达 32MHz 的高频晶振
(1)
配有五个捕捉/比较寄存器的 16 位计时器 TA0,Timer_A
配有三个捕捉/比较寄存器的 16 位计时器 TA1,Timer_A
具有七个捕捉/比较影子寄存器的 16 位计时器 TB0,Timer_B
多达 4 个通用串行通信接口
USCI_A0、USCI_A1、USCI_A2 和 USCI_A3 均支持
支持自动波特率检测功能的增强型 UART
红外数据通讯 (IrDA) 编码器和解码器
同步 SPI
USCI_B0、USCI_B1、USCI_B2 和 USCI_B3 均支持
I
2
C
同步 SPI
12 位模数转换器 (ADC)
内部基准
采样和保持功能
自动扫描特性
14 个外部通道,2 个内部通道
支持 32 位运算的硬件乘法器
串行板上编程,无需外部编程电压
3 通道内部 DMA
带有实时时钟特性的基本计时器
宽工作范围:-40°C 至 125°C(Q 级温度),-55°C 至 125°C(M 级温度)(某些标注的参数只是针对 -40°C 至 85°C 指定的)
可用的 SnAgCu (ZCA) 或 SnPb (GCA) 焊球材料
1.
对于 32kHz 和高频晶振,不能保证晶体在 85°C 以上使用晶振。