SLVS844A September   2008  – June 2015 TPS65055

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Dissipation Ratings
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
      1. 8.1.1 DCDC1 Converter
      2. 8.1.2 DCDC2 Converter
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Save Mode
        1. 8.3.1.1 Dynamic Voltage Positioning
        2. 8.3.1.2 Soft Start
        3. 8.3.1.3 100% Duty Cycle Low Dropout Operation
        4. 8.3.1.4 Undervoltage Lockout
      2. 8.3.2 Enable
      3. 8.3.3 Discharge
      4. 8.3.4 RST and DPD
      5. 8.3.5 Short-Circuit Protection
      6. 8.3.6 Thermal Shutdown
      7. 8.3.7 LDO1 to LDO4
        1. 8.3.7.1 Default Voltage Setting for LDOs and DCDC1
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
      1. 8.5.1 Interface Specification
        1. 8.5.1.1 Serial Interface
    6. 8.6 Register Maps
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Voltage Setting
          1. 9.2.2.1.1 Converter 1 (DCDC1)
          2. 9.2.2.1.2 Converter 2 (DCDC2)
        2. 9.2.2.2 Output Filter Design (Inductor and Output Capacitor)
          1. 9.2.2.2.1 Inductor Selection
          2. 9.2.2.2.2 Output Capacitor Selection
          3. 9.2.2.2.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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1 Features

  • Up to 95% Efficiency
  • Output Current for DCDC Converters 2 × 0.6 A
  • Two Selectable Fixed Output Voltages 1 V and 1.2 V for DCDC2
  • VIN Range for DCDC Converters From 2.5 V to 6 V
  • 2.25-MHz Fixed-Frequency Operation
  • Power Save Mode at Light Load Current
  • 180° Out-of-Phase Operation
  • Output Voltage Accuracy in PWM Mode ±1%
  • Low Ripple PFM Mode
  • Total Typical 32-μA Quiescent Current for Both DC-DC Converters
  • 100% Duty Cycle for Lowest Dropout
  • 2 General-Purpose 400 mA High PSRR LDOs
  • 2 General-Purpose 200 mA High PSRR LDOs
  • VIN Range for LDOs From 1.5 V to 6.5 V
  • Digital Voltage Selection for the LDOs
  • I2C Compatible Interface
  • Available in a 4 mm × 4 mm 32-Pin QFN Package

2 Applications

  • Cell Phones, Smart Phones
  • WLAN
  • PDAs, Pocket PCs
  • OMAP™ and Low Power DSP Supplies
  • XScale
  • Portable Media Players
  • Digital Cameras

3 Description

The TPS65055 device is an integrated Power Management IC for applications powered by one Li-Ion or Li-Polymer cell, which require multiple power rails.

The TPS65055 provides two highly efficient,
2.25 MHz step-down converters targeted at providing the core voltage and I/O voltage in a processor-based system. Both step-down converters enter a low power mode at light load for maximum efficiency across the widest possible range of load currents.

For low noise applications the device can be forced into fixed frequency PWM mode using the I2C compatible interface. In shutdown mode, current consumption is reduced to less than 1 μA.

The device allows the use of small inductors and capacitors to achieve a small solution size.

The TPS65055 provides an output current of up to 0.6 A on each DC-DC converter.

The TPS65055 also integrates two 400-mA LDO and two 200-mA LDO voltage regulators, which can be turned on/off using separate enable pins on each LDO. Each LDO operates with an input voltage range from 1.5 V to 6.5 V allowing them to be supplied from one of the step-down converters or directly from the main battery. Two digital input pins are used to set the output voltage of the LDOs from a set of 9 different combinations for LDO1 to LDO4. Additionally, the converters can be controlled by an I2C compatible interface.

The TPS65055 is available in a small 32-pin leadless package (4 mm × 4 mm QFN) with a 0.4-mm pitch.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS65055 VQFN (32) 4.00 mm × 4.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Block Diagram

TPS65055 fbd_lvs844.gif

4 Revision History

Changes from * Revision (September 2008) to A Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo