CSD13380F3 12-V N-Channel FemtoFET MOSFET

1 Features

Low on resistance
Ultra-low Q_g and Q_gd
High operating drain current
Ultra-small footprint
- 0.73 mm × 0.64 mm
Low profile
- 0.36-mm max height
Integrated ESD protection diode
- Rated > 3-kV HBM
- Rated > 2-kV CDM
Lead and halogen free
RoHS compliant

2 Applications

Optimized for load switch applications
Optimized for general purpose switching applications
Battery applications
Handheld and mobile applications

3 Description

This 63-mΩ, 12-V N-Channel FemtoFET™ MOSFET is designed and optimized to minimize the footprint in many handheld and mobile applications. This technology is capable of replacing standard small signal MOSFETs while providing a substantial reduction in footprint size.

Typical Part Dimensions

Product Summary

T_A = 25°C		TYPICAL VALUE		UNIT
V_DS	Drain-to-Source Voltage	12		V
Q_g	Gate Charge Total (4.5 V)	0.91		nC
Q_gd	Gate Charge Gate-to-Drain	0.15		nC
R_DS(on)	Drain-to-Source On Resistance	V_GS = 1.8 V	96	mΩ
		V_GS = 2.5 V	73
		V_GS = 4.5 V	63
V_GS(th)	Threshold Voltage	0.85		V

Device Information⁽¹⁾

DEVICE	QTY	MEDIA	PACKAGE	SHIP
CSD13380F3	3000	7-Inch Reel	Femto 0.73 mm × 0.64 mm Land Grid Array (LGA)	Tape and Reel
CSD13380F3T	250	7-Inch Reel	Femto 0.73 mm × 0.64 mm Land Grid Array (LGA)	Tape and Reel

(1) For all available packages, see the orderable addendum at the end of the data sheet.

Absolute Maximum Ratings

T_A = 25°C (unless otherwise stated)		VALUE	UNIT
V_DS	Drain-to-Source Voltage	12	V
V_GS	Gate-to-Source Voltage	8	V
I_D	Continuous Drain Current⁽¹⁾	3.6	A
I_D	Continuous Drain Current⁽²⁾	2.1	A
I_DM	Pulsed Drain Current⁽²⁾⁽³⁾	13.5	A
P_D	Power Dissipation⁽¹⁾	1.4	W
P_D	Power Dissipation⁽²⁾	0.5	W
V_(ESD)	Human-Body Model (HBM)	3	kV
V_(ESD)	Charged-Device Model (CDM)	2	kV
T_J, T_stg	Operating Junction, Storage Temperature	–55 to 150	°C

(1) Max Cu, typical R_θJA = 90°C/W on 1-in² (6.45-cm²), 2-oz
(0.071-mm) thick Cu pad on a 0.06-in (1.52-mm) thick FR4 PCB.

(2) Min Cu, typical R_θJA = 255°C/W.

(3) Pulse duration ≤ 100 μs, duty cycle ≤ 1%.

Top View

4 Revision History

Changes from Revision * (October 2016) to Revision A (February 2022)

Changed ultra-low profile bullet from 0.35 mm to 0.36 mm in height.Go
Updated ultra-low profile image height from 0.35 mm to 0.36 mm.Go
Changed ultra-low profile image height from 0.35 mm to 0.36 mm.Go
Added FemtoFET Surface Mount Guide note.Go

5 Specifications

5.1 Electrical Characteristics

T_A = 25°C (unless otherwise stated)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
STATIC CHARACTERISTICS
BV_DSS	Drain-to-source voltage	V_GS = 0 V, I_DS = 250 μA	12			V
I_DSS	Drain-to-source leakage current	V_GS = 0 V, V_DS = 9.6 V			50	nA
I_GSS	Gate-to-source leakage current	V_DS = 0 V, V_GS = 8 V			25	nA
V_GS(th)	Gate-to-source threshold voltage	V_DS = V_GS, I_DS = 250 μA	0.55	0.85	1.30	V
R_DS(on)	Drain-to-source on resistance	V_GS = 1.8 V, I_DS = 0.1 A		96	135	mΩ
		V_GS = 2.5 V, I_DS = 0.4 A		73	92
		V_GS = 4.5 V, I_DS = 0.4 A		63	76
g_fs	Transconductance	V_DS = 1.2 V, I_DS = 0.4 A		4.3		S
DYNAMIC CHARACTERISTICS
C_iss	Input capacitance	V_GS = 0 V, V_DS = 6 V, ƒ = 1 MHz		120	156	pF
C_oss	Output capacitance			81	105	pF
C_rss	Reverse transfer capacitance			9.6	12.5	pF
R_G	Series gate resistance			16		Ω
Q_g	Gate charge total (4.5 V)	V_DS = 6 V, I_DS = 0.4 A		0.91	1.2	nC
Q_gd	Gate charge gate-to-drain			0.15		nC
Q_gs	Gate charge gate-to-source			0.19		nC
Q_g(th)	Gate charge at V_th			0.15		nC
Q_oss	Output charge	V_DS = 6 V, V_GS = 0 V		0.81		nC
t_d(on)	Turnon delay time	V_DS = 6 V, V_GS = 4.5 V, I_DS = 0.4 A, R_G = 2 Ω		4		ns
t_r	Rise time			4		ns
t_d(off)	Turnoff delay time			11		ns
t_f	Fall time			3		ns
DIODE CHARACTERISTICS
V_SD	Diode forward voltage	I_SD = 0.4 A, V_GS = 0 V		0.71	1	V
Q_rr	Reverse recovery charge	V_DS= 6 V, I_F = 0.4 A, di/dt = 100 A/μs		2.1		nC
t_rr	Reverse recovery time	V_DS= 6 V, I_F = 0.4 A, di/dt = 100 A/μs		8		ns