CSD88539ND Dual 60 V N-Channel NexFET Power MOSFETs

1 Features

Ultra-Low Q_g and Q_gd
Avalanche Rated
Pb Free
RoHS Compliant
Halogen Free

2 Applications

Half Bridge for Motor Control
Synchronous Buck Converter

3 Description

This dual SO-8, 60 V, 23 mΩ NexFET™ power MOSFET is designed to serve as a half bridge in low-current motor control applications.

Figure 3-1 Top View

Product Summary

T_A = 25°C		TYPICAL VALUE		UNIT
V_DS	Drain-to-Source Voltage	60		V
Q_g	Gate Charge Total (10 V)	7.2		nC
Q_gd	Gate Charge Gate to Drain	1.1		nC
R_DS(on)	Drain-to-Source On Resistance	V_GS = 6 V	27	mΩ
R_DS(on)	Drain-to-Source On Resistance	V_GS = 10 V	23	mΩ
V_GS(th)	Threshold Voltage	3.0		V

Ordering Information⁽¹⁾

Device	Qty	Media	Package	Ship
CSD88539ND	2500	13-Inch Reel	SO-8 Plastic Package	Tape and Reel
CSD88539NDT	250	7-Inch Reel	SO-8 Plastic Package	Tape and Reel

(1) For all available packages, see the orderable addendum at the end of the data sheet.

Absolute Maximum Ratings

T_A = 25°C		VALUE	UNIT
V_DS	Drain-to-Source Voltage	60	V
V_GS	Gate-to-Source Voltage	±20	V
I_D	Continuous Drain Current (Package limited)	15	A
	Continuous Drain Current (Silicon limited), T_C = 25°C	11.7
	Continuous Drain Current⁽¹⁾	6.3
I_DM	Pulsed Drain Current ⁽²⁾	46	A
P_D	Power Dissipation⁽¹⁾	2.1	W
T_J, T_STG	Operating Junction and Storage Temperature Range	–55 to 150	°C
E_AS	Avalanche Energy, single pulse I_D = 22 A, L = 0.1 mH, R_G = 25 Ω	24	mJ

(1) Typical R_θJA = 60°C/W on a 1-inch², 2-oz. Cu pad on a 0.06-inch thick FR4 PCB

(2) Pulse duration ≤300 μs, duty cycle ≤2%

R_DS(on) vs V_GS

Gate Charge

4 Specifications

4.1 Electrical Characteristics

(T_A = 25°C unless otherwise stated)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
STATIC CHARACTERISTICS
BV_DSS	Drain-to-Source Voltage	V_GS = 0 V, I_D = 250 μA	60			V
I_DSS	Drain-to-Source Leakage Current	V_GS = 0 V, V_DS = 48 V			1	μA
I_GSS	Gate-to-Source Leakage Current	V_DS = 0 V, V_GS = 20 V			100	nA
V_GS(th)	Gate-to-Source Threshold Voltage	V_DS = V_GS, I_D = 250 μA	2.6	3.0	3.6	V
R_DS(on)	Drain-to-Source On Resistance	V_GS = 6 V, I_D = 5 A		27	34	mΩ
R_DS(on)	Drain-to-Source On Resistance	V_GS = 10 V, I_D = 5 A		23	28	mΩ
g_fs	Transconductance	V_DS = 30 V, I_D = 5 A		19		S
DYNAMIC CHARACTERISTICS
C_iss	Input Capacitance	V_GS = 0 V, V_DS = 30 V, ƒ = 1 MHz		570	741	pF
C_oss	Output Capacitance			70	91	pF
C_rss	Reverse Transfer Capacitance			2.0	2.6	pF
R_G	Series Gate Resistance			6.6	13.2	Ω
Q_g	Gate Charge Total (10 V)	V_DS = 30 V, I_D = 5 A		7.2	9.4	nC
Q_gd	Gate Charge Gate to Drain			1.1		nC
Q_gs	Gate Charge Gate to Source			2.7		nC
Q_g(th)	Gate Charge at V_th			1.8		nC
Q_oss	Output Charge	V_DS = 30 V, V_GS = 0 V		9.6		nC
t_d(on)	Turn On Delay Time	V_DS = 30 V, V_GS = 10 V, I_DS = 5 A, R_G = 0 Ω		5		ns
t_r	Rise Time			9		ns
t_d(off)	Turn Off Delay Time			14		ns
t_f	Fall Time			4		ns
DIODE CHARACTERISTICS
V_SD	Diode Forward Voltage	I_SD = 5 A, V_GS = 0 V		0.8	1	V
Q_rr	Reverse Recovery Charge	V_DS= 30 V, I_F = 5A, di/dt = 300A/μs		37		nC
t_rr	Reverse Recovery Time	V_DS= 30 V, I_F = 5A, di/dt = 300A/μs		21		ns

4.2 Thermal Information

(T_A = 25°C unless otherwise stated)

THERMAL METRIC		MIN	TYP	MAX	UNIT
R_θJL	Junction-to-Lead Thermal Resistance⁽¹⁾			20	°C/W
R_θJA	Junction-to-Ambient Thermal Resistance⁽¹⁾⁽²⁾			75	°C/W

(1) R_θJC is determined with the device mounted on a 1-inch² (6.45-cm²), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. R_θJC is specified by design, whereas R_θJA is determined by the user’s board design.

(2) Device mounted on FR4 material with 1-inch² (6.45-cm²), 2-oz. (0.071-mm thick) Cu.