SLLSEN3 December   2015 ISO7421-EP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: VCC1 and VCC2 at 5 V ±10%
    6. 6.6  Electrical Characteristics: VCC1 at 5 V ±10%, VCC2 at 3.3 V ±10%
    7. 6.7  Electrical Characteristics: VCC1 at 3.3 V ±10%, VCC2 at 5 V ±10%
    8. 6.8  Electrical Characteristics: VCC1 and VCC2 at 3.3 V ±10%
    9. 6.9  Power Dissipation
    10. 6.10 Switching Characteristics: VCC1 and VCC2 at 5 V ±10%
    11. 6.11 Switching Characteristics: VCC1 at 5 V ±10%, VCC2 at 3.3 V ±10%
    12. 6.12 Switching Characteristics: VCC1 at 3.3 V ±10%, VCC2 at 5 V ±10%
    13. 6.13 Switching Characteristics: VCC1 and VCC2 at 3.3 V ±10%
    14. 6.14 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Insulation Characteristics
      2. 8.3.2 Package Characteristics
      3. 8.3.3 Safety Limiting Values
      4. 8.3.4 Regulatory Information
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Highest Signaling Rate: 1 Mbps
  • Low Power Consumption, Typical ICC per Channel (3.3-V Operation): 1.5 mA
  • Low Propagation Delay – 9 ns Typical
  • Low Skew – 300 ps Typical
  • Wide TJ Range: –55°C to 136°C
  • 50-kV/μs Transient Immunity, Typical
  • Over 25-Year Isolation Integrity at Rated Voltage
  • Operates From 3.3-V and 5-V Supply and Logic Levels
  • 3.3-V and 5-V Level Translation
  • Narrow Body SOIC-8 Package
  • Safety and Regulatory Approvals:
    • 4242 VPK Isolation per DIN V VDE V 0884-10 and DIN EN 61010-1
    • 2500 VRMS Isolation for 1 minute per UL 1577
    • CSA Component Acceptance Notice 5A, IEC 60950-1 and IEC 61010-1 Standards
    • CQC Certification per GB4943.1-2011

2 Applications

  • Optocoupler Replacement in:
    • Industrial Fieldbus
      • Profibus
      • Modbus
      • DeviceNet™ Data Buses
    • Servo Control Interface
    • Motor Control
    • Power Supplies
    • Battery Packs

3 Description

The ISO7421-EP device provides galvanic isolation up to 2500 VRMS for 1 minute per UL. The ISO7421-EP device has two isolated channels. Each isolation channel has a logic input and output buffer separated by a silicon dioxide (SiO2) insulation barrier. Used in conjunction with isolated power supplies, the device prevents noise currents on a data bus or other circuit from entering the local ground and interfering with or damaging sensitive circuitry.

This device have TTL input thresholds and require two supply voltages, 3.3 or 5 V, or any combination. All inputs are 5-V tolerant when supplied from a 3.3-V supply.

The ISO7421-EP device is specified for signaling rates up to 1 Mbps. Due to its fast response time, under most cases, this device will also transmit data with much shorter pulse widths. Designers should add external filtering to remove spurious signals with input pulse duration <20 ns if desired.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
ISO7421-EP SOIC (8) 4.90 mm × 3.91 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Conceptual Block Diagram of a Digital Capacitive Isolator

ISO7421-EP fbdc_slls984.gif