SPRUJC9 March   2025 AM62L

 

  1.   1
  2.   ABSTRACT
  3.   Trademarks
  4. 1 Introduction
    1. 1.1 Before Getting Started With the Custom Board Design
      1. 1.1.1 AM62Lx Processor Family Change Summary (With Respect to AM62x Processor Family)
    2. 1.2 Processor Selection
    3. 1.3 Technical Documentation
      1. 1.3.1 Updated EVM Schematic With Design, Review and Cad Notes Added
        1. 1.3.1.1 AM62Lx
      2. 1.3.2 FAQs to Support Custom Board Design
    4. 1.4 Custom Board Design Documentation
    5. 1.5 Queries During Custom Board Design
  5. 2 Block Diagram
    1. 2.1 Constructing the Block Diagram
    2. 2.2 Configuring the Boot Mode
    3. 2.3 Confirming PinMux (PinMux Configuration)
  6. 3 Power Supply
    1. 3.1 Power Supply Architecture
      1. 3.1.1 Integrated Power
      2. 3.1.2 Discrete Power
    2. 3.2 Power (Supply) Rails
      1. 3.2.1 Supported Low-Power Modes
      2. 3.2.2 Core Supply
      3. 3.2.3 Peripheral Power Supply
      4. 3.2.4 Integrated LDO for SD Card Interface (Supply for Dynamic Switching Dual-voltage IOs)
      5. 3.2.5 Internal LDOs for IO Supply for IO groups (Processor)
      6. 3.2.6 Processor IO Supply for IO Group
        1. 3.2.6.1 1.8V or 3.3V Dual-voltage IO Supply for IO Group
          1. 3.2.6.1.1 Additional Information
        2. 3.2.6.2 1.8V Fixed IO Supply for IO Group
      7. 3.2.7 VPP (eFuse ROM Programming) Supply
    3. 3.3 Determining Board Power Requirements
    4. 3.4 Power Supply Filters
    5. 3.5 Power Supply Decoupling and Bulk Capacitors
      1. 3.5.1 Note on PDN Target Impedance
    6. 3.6 Power Supply Sequencing
    7. 3.7 Supply Diagnostics
    8. 3.8 Power Supply Monitoring
  7. 4 Processor Clocking
    1. 4.1 Processor External Clock Source
      1. 4.1.1 Unused LFOSC0
      2. 4.1.2 LVCMOS Digital Clock Source
      3. 4.1.3 Crystal Selection
    2. 4.2 Processor Clock Outputs
  8. 5 Joint Test Action Group (JTAG)
    1. 5.1 JTAG / Emulation
      1. 5.1.1 Configuration of JTAG / Emulation
        1. 5.1.1.1 AM62Lx
      2. 5.1.2 Implementation of JTAG / Emulation
      3. 5.1.3 Connection of JTAG Interface Signals
  9. 6 Configuration (Processor) and Initialization (Processor and Device)
    1. 6.1 Processor Reset
      1. 6.1.1 RTC Power-on Reset (RTC_PORz)
    2. 6.2 Latching of Boot Mode Configuration
    3. 6.3 Resetting the Attached Devices
    4. 6.4 Watchdog Timer
  10. 7 Processor Peripherals
    1. 7.1  Selecting Peripherals Across Domains
    2. 7.2  Memory Controller (DDRSS)
      1. 7.2.1 Processor DDR Subsystem and Device Register Configuration
      2. 7.2.2 Calibration Resistor Connection for DDRSS
      3. 7.2.3 Attached Memory Device ZQ and Reset_N Connection
    3. 7.3  Media and Data Storage Interfaces
      1. 7.3.1 Multi-Media Card/Secure Digital (MMCSD) Interface
      2. 7.3.2 Octal Serial Peripheral Interface (OSPI) / Quad Serial Peripheral Interface (QSPI)
      3. 7.3.3 General-Purpose Memory Controller (GPMC) Interface
    4. 7.4  Common Platform Ethernet Switch 3-port Gigabit (CPSW3G - for Ethernet Interface)
      1. 7.4.1 AM62Lx
    5. 7.5  Programmable Real-Time Unit Subsystem (PRUSS)
    6. 7.6  Universal Serial Bus (USB) Subsystem
    7. 7.7  General Connectivity Peripherals
      1. 7.7.1 I2C (Open-Drain and Emulated Open-Drain) Interface
        1. 7.7.1.1 AM62Lx
        2. 7.7.1.2 Additional Information
    8. 7.8  Analog-to-Digital Converter (ADC)
      1. 7.8.1 AM62Lx
    9. 7.9  Display Subsystem (DSS)
      1. 7.9.1 AM62Lx
    10. 7.10 Connection of Processor Power Supply Pins, Unused Peripherals and IOs
      1. 7.10.1 External Interrupt (EXTINTn)
      2. 7.10.2 External Wakeup Inputs (EXT_WAKEUP0 and EXT_WAKEUP1)
      3. 7.10.3 Reserved (RSVD) Pin
  11. 8 Interfacing of Processor IOs (LVCMOS or Open-Drain or Fail-Safe Type IO Buffers) and Simulations
    1. 8.1 IBIS Model
    2. 8.2 IBIS-AMI Model
  12. 9 Processor Current Rating and Thermal Analysis
    1. 9.1 Power Estimation
    2. 9.2 Maximum Current Rating for Different Supply Rails
    3. 9.3 Power Modes
    4. 9.4 Thermal Design Guidelines
      1. 9.4.1 AM62Lx
      2. 9.4.2 Voltage Thermal Management Module (VTM)
  13. 10Schematic:- Design, Capture, Entry and Review
    1. 10.1 Selection of Components and Values
    2. 10.2 Schematic Design and Capture
    3. 10.3 Schematic Review
  14. 11Floor Planning, Layout, Routing Guidelines, Board Layers and Simulation
    1. 11.1 Escape Routing for PCB Design
    2. 11.2 DDR Design and Layout Guidelines
    3. 11.3 High-Speed Differential Signals Routing Guidelines
    4. 11.4 Board Layer Count and Stack-up
      1. 11.4.1 Simulation Recommendations
    5. 11.5 Reference for Steps to be Followed for Running Simulation
  15. 12Custom Board Assembly and Testing
    1. 12.1 Guidelines and Board Bring-up Tips
  16. 13Device Handling and Assembly
    1. 13.1 Soldering Recommendations
      1. 13.1.1 Additional References
  17. 14References
    1. 14.1 Processor-Specific
    2. 14.2 Common
  18. 15Terminology
User's Guide

Hardware Design Considerations for Custom Board Design Using AM62L (AM62L32, AM62L31) Family of Processors