SN74LVC16T245 16-bit Dual-Supply Bus Transceiver With Configurable Level-Shifting / Voltage Translation and Tri-State Outputs
- SCES636B AUGUST 2005 – April 2015 SN74LVC16T245
  
  PRODUCTION DATA.

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DATA SHEET

SN74LVC16T245 16-bit Dual-Supply Bus Transceiver With Configurable Level-Shifting / Voltage Translation and Tri-State Outputs

1 Features

Control Inputs V_IH/V_IL Levels are Referenced to V_CCA Voltage
V_CC Isolation Feature – If Either V_CC Input is at GND, Both Ports are in the High-Impedance State
Overvoltage-Tolerant Inputs and Outputs Allow Mixed Voltage-Mode Data Communications
Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.65-V to 5.5-V Power-Supply Range
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22

2 Applications

Personal Electronics
Industrial
Enterprise
Telecom

3 Description

This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track V_CCB. V_CCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

The SN74LVC16T245 device is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess I_CC and I_CCZ.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
SN74LVC16T245	TSSOP (48)	12.50 mm × 6.10 mm
	TVSOP (48)	9.70 mm × 4.40 mm
	SSOP (48)	15.88 mm × 7.49 mm
	BGA MICROSTAR JUNIOR (56)	7.00 mm × 4.50 mm

For all available packages, see the orderable addendum at the end of the data sheet.

Logic Diagram (Positive Logic)

4 Revision History

Changes from A Revision (October 2005) to B Revision

Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go

5 Description (continued)

The SN74LVC16T245 control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by V_CCA.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The V_CC isolation feature ensures that if either V_CC input is at GND, then both ports are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

6 Pin Configuration and Functions

DGG and DGV Packages

48-Pin TSSOP and TVSOP

(Top View)

GQL and ZQL Packages

56-Pin BGA

(Top View)

Pin Functions

PIN			I/O	DESCRIPTION
NAME	DGG / DGV	GQL / ZQL	I/O	DESCRIPTION
1A1	47	B5	I/O	Input/Output. Referenced to V_CCA
1A2	46	B6	I/O	Input/Output. Referenced to V_CCA
1A3	44	C5	I/O	Input/Output. Referenced to V_CCA
1A4	43	C6	I/O	Input/Output. Referenced to V_CCA
1A5	41	D5	I/O	Input/Output. Referenced to V_CCA
1A6	40	D6	I/O	Input/Output. Referenced to V_CCA
1A7	38	E5	I/O	Input/Output. Referenced to V_CCA
1A8	37	E6	I/O	Input/Output. Referenced to V_CCA
1B1	2	B2	I/O	Input/Output. Referenced to V_CCB
1B2	3	B1	I/O	Input/Output. Referenced to V_CCB
1B3	5	C2	I/O	Input/Output. Referenced to V_CCB
1B4	6	C1	I/O	Input/Output. Referenced to V_CCB
1B5	8	D2	I/O	Input/Output. Referenced to V_CCB
1B6	9	D1	I/O	Input/Output. Referenced to V_CCB
1B7	11	E2	I/O	Input/Output. Referenced to V_CCB
1B8	12	E1	I/O	Input/Output. Referenced to V_CCB
1DIR	1	A1	I	Direction-control signal
1OE	48	A6	I	Tri-State output-mode enables. Pull OE high to place all outputs in Tri-State mode. Referenced to V_CCA
2A1	36	F6	I/O	Input/Output. Referenced to V_CCA
2A2	35	F5	I/O	Input/Output. Referenced to V_CCA
2A3	33	G6	I/O	Input/Output. Referenced to V_CCA
2A4	32	G5	I/O	Input/Output. Referenced to V_CCA
2A5	30	H6	I/O	Input/Output. Referenced to V_CCA
2A6	29	H5	I/O	Input/Output. Referenced to V_CCA
2A7	27	J6	I/O	Input/Output. Referenced to V_CCA
2A8	26	J5	I/O	Input/Output. Referenced to V_CCA
2B1	13	F1	I/O	Input/Output. Referenced to V_CCB
2B2	14	F2	I/O	Input/Output. Referenced to V_CCB
2B3	16	G1	I/O	Input/Output. Referenced to V_CCB
2B4	17	G2	I/O	Input/Output. Referenced to V_CCB
2B5	19	H1	I/O	Input/Output. Referenced to V_CCB
2B6	20	H2	I/O	Input/Output. Referenced to V_CCB
2B7	22	J1	I/O	Input/Output. Referenced to V_CCB
2B8	23	J2	I/O	Input/Output. Referenced to V_CCB
2DIR	24	K1	I	Direction-control signal
2OE	25	K6	I	Tri-State output-mode enables. Pull OE high to place all outputs in Tri-State mode. Referenced to V_CCA
GND	4	B3	—	Ground
	4	B4
	10	D3
	15	D4
	21	G3
	28	G4
	34	J3
	45	J4
NC⁽¹⁾	—	A2	—
		A3
		A4
		A5
		K2
		K3
		K4
		K5
V_CCA	31	C4	—	A-port supply. 1.65 V ≤ V_CCA≤ 5.5 V
V_CCA	42	H4	—	A-port supply. 1.65 V ≤ V_CCA≤ 5.5 V
V_CCB	7	C3	—	B-port supply. 1.65 V ≤ V_CCB≤ 5.5 V
V_CCB	18	H3	—	B-port supply. 1.65 V ≤ V_CCB≤ 5.5 V

(1) NC – No internal connection

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

			MIN	MAX	UNIT
V_CCA V_CCB	Supply voltage		–0.5	6.5	V
V_I	Input voltage⁽²⁾	I/O ports (A port)	–0.5	6.5	V
		I/O ports (B port)	–0.5	6.5
		Control inputs	–0.5	6.5
V_O	Voltage applied to any output in the high-impedance or power-off state⁽²⁾	A port	–0.5	6.5	V
V_O		B port	–0.5	6.5	V
V_O	Voltage applied to any output in the high or low state⁽²⁾⁽³⁾	A port	–0.5	V_CCA + 0.5	V
V_O		B port	–0.5	V_CCB + 0.5	V
I_IK	Input clamp current	V_I < 0		–50	mA
I_OK	Output clamp current	V_O < 0		–50	mA
I_O	Continuous output current			±50	mA
	Continuous current through each V_CCA, V_CCB, and GND			±100	mA
T_J	Junction temperature		-40	150	°C
T_stg	Storage temperature		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The input (V_I ) and output (V_O) negative-voltage ratings may be exceeded if the input and output current ratings are observed.

(3) The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed.

7.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
		Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±1000
		Machine model (A115-A)	±200

(1) JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

See ⁽¹⁾⁽²⁾⁽³⁾⁽⁴⁾

			V_CCI	V_CCO	MIN	MAX	UNIT
V_CCA	Supply voltage				1.65	5.5	V
V_CCB	Supply voltage				1.65	5.5	V
V_IH	High-level input voltage	Data inputs⁽⁵⁾	1.65 V to 1.95 V		V_CCI × 0.65		V
			2.3 V to 2.7 V		1.7
			3 V to 3.6 V		2
			4.5 V to 5.5 V		V_CCI × 0.7
V_IL	Low-level input voltage	Data inputs⁽⁵⁾	1.65 V to 1.95 V			V_CCI × 0.35	V
			2.3 V to 2.7 V			0.7
			3 V to 3.6 V			0.8
			4.5 V to 5.5 V			V_CCI × 0.3
V_IH	High-level input voltage	Control inputs (referenced to V_CCA)⁽⁶⁾	1.65 V to 1.95 V		V_CCA × 0.65		V
			2.3 V to 2.7 V		1.7
			3 V to 3.6 V		2
			4.5 V to 5.5 V		V_CCA × 0.7
V_IL	Low-level input voltage	Control inputs (referenced to V_CCA)⁽⁶⁾	1.65 V to 1.95 V			V_CCA × 0.35	V
			2.3 V to 2.7 V			0.7
			3 V to 3.6 V			0.8
			4.5 V to 5.5 V			V_CCA × 0.3
V_I	Input voltage	Control inputs			0	5.5	V
V_I/O	Input/output voltage	Active state			0	V_CCO	V
V_I/O	Input/output voltage	Tri-State			0	5.5	V
I_OH	High-level output current			1.65 V to 1.95 V		–4	mA
				2.3 V to 2.7 V		–8
				3 V to 3.6 V		–24
				4.5 V to 5.5 V		–32
I_OL	Low-level output current			1.65 V to 1.95 V		4	mA
				2.3 V to 2.7 V		8
				3 V to 3.6 V		24
				4.5 V to 5.5 V		32
Δt/Δv	Input transition rise or fall rate	Data inputs	1.65 V to 1.95 V			20	ns/V
			2.3 V to 2.7 V			20
			3 V to 3.6 V			10
			4.5 V to 5.5 V			5
T_A	Operating free-air temperature				–40	85	°C

(1) V_CCI is the V_CC associated with the input port.

(2) V_CCO is the V_CC associated with the output port.

(3) All unused or driven (floating) data inputs (I/Os) of the device must be held at logic HIGH or LOW (preferably V_CCI or GND) to ensure proper device operation and minimize power. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

(4) All unused data inputs of the device must be held at V_CCA or GND to ensure proper device operation.

(5) For V_CCI values not specified in the data sheet, V_IH min = V_CCI × 0.7 V, V_IL max = V_CCI × 0.3 V.

(6) For V_CCA values not specified in the data sheet, V_IH min = V_CCA × 0.7 V, V_IL max = V_CCA × 0.3 V.

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		SN74LVC16T245				UNIT
		DL (SSOP)	DGG (TSSOP)	DGV (TVSOP)	GQL / ZQL (BGA)
		48 PINS	48 PINS	48 PINS	56 PINS
R_θJA	Junction-to-ambient thermal resistance	92.9	60	82.5	64.6	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	29.5	13.9	34.2	16.6	°C/W
R_θJB	Junction-to-board thermal resistance	35.5	27.1	45.1	30.8	°C/W
ψ_JT	Junction-to-top characterization parameter	8.1	0.5	2.7	0.9	°C/W
ψ_JB	Junction-to-board characterization parameter	34.9	26.8	44.6	64.6	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

PARAMETER		TEST CONDITIONS		V_CCA	V_CCB	T_A = 25°C			T_A = –40°C to 85°C		UNIT
PARAMETER		TEST CONDITIONS		V_CCA	V_CCB	MIN	TYP	MAX	MIN	MAX	UNIT
V_OH		I_OH = –100 μA,	V_I = V_IH	1.65 V to 4.5 V	1.65 V to 4.5 V				V_CCO – 0.1		V
		I_OH = –4 mA,	V_I = V_IH	1.65 V	1.65 V				1.2
		I_OH = –8 mA,	V_I = V_IH	2.3 V	2.3 V				1.9
		I_OH = –24 mA,	V_I = V_IH	3 V	3 V				2.4
		I_OH = –32 mA,	V_I = V_IH	4.5 V	4.5 V				3.8
V_OL		I_OL = 100 μA,	V_I = V_IL	1.65 V to 4.5 V	1.65 V to 4.5 V					0.1	V
		I_OL = 4 mA,	V_I = V_IL	1.65 V	1.65 V					0.45
		I_OL = 8 mA,	V_I = V_IL	2.3 V	2.3 V					0.3
		I_OL = 24 mA,	V_I = V_IL	3 V	3 V					0.55
		I_OL = 32 mA,	V_I = V_IL	4.5 V	4.5 V					0.55
I_I	Control inputs	V_I = V_CCA or GND		1.65 V to 5.5 V	1.65 V to 5.5 V			±1		±2	μA
I_off	A or B port	V_I or V_O = 0 to 5.5 V		0 V	0 to 5.5 V			±1		±2	μA
I_off	A or B port	V_I or V_O = 0 to 5.5 V		0 to 5.5 V	0 V			±1		±2	μA
I_OZ	A or B port	V_O = V_CCO or GND, OE = V_IH		1.65 V to 5.5 V	1.65 V to 5.5 V			±1		±2	μA
I_CCA		V_I = V_CCI or GND, I_O = 0		1.65 V to 5.5 V	1.65 V to 5.5 V					20	μA
				5 V	0 V					20
				0 V	5 V					–2
I_CCB		V_I = V_CCI or GND, I_O = 0		1.65 V to 5.5 V	1.65 V to 5.5 V					20	μA
				5 V	0 V					–2
				0 V	5 V					20
I_CCA + I_CCB		V_I = V_CCI or GND, I_O = 0		1.65 V to 5.5 V	1.65 V to 5.5 V					30	μA
ΔI_CCA	A port	One A port at V_CCA – 0.6 V, DIR at V_CCA, B port = open		3 V to 5.5 V	3 V to 5.5 V					50	μA
ΔI_CCA	DIR	DIR at V_CCA – 0.6 V, B port = open, A port at V_CCA or GND		3 V to 5.5 V	3 V to 5.5 V					50	μA
ΔI_CCB	B port	One B port at V_CCB – 0.6 V, DIR at GND, A port = open		3 V to 5.5 V	3 V to 5.5 V					50	μA
C_i	Control inputs	V_I = V_CCA or GND		3.3 V	3.3 V		4			5	pF
C_io	A or B port	V_O = V_CCA/B or GND		3.3 V	3.3 V		8.5			10	pF

(1) V_CCO is the V_CC associated with the output port.

(2) V_CCI is the V_CC associated with the input port.

7.6 Switching Characteristics: V_CCA = 1.8 V ±0.15 V

over recommended operating free-air temperature range, V_CCA = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 3)

PARAMETER	FROM (INPUT)	TO (OUTPUT)	V_CCB = 1.8 V ±0.15 V		V_CCB = 2.5 V ±0.2 V		V_CCB = 3.3 V ±0.3 V		V_CCB = 5 V ±0.5 V		UNIT
PARAMETER	FROM (INPUT)	TO (OUTPUT)	MIN	MAX	MIN	MAX	MIN	MAX	MIN	MAX	UNIT
t_PLH	A	B	1.7	21.9	1.3	9.2	1	7.4	0.8	7.1	ns
t_PHL	A	B	1.7	21.9	1.3	9.2	1	7.4	0.8	7.1	ns
t_PLH	B	A	0.9	23.8	0.8	23.6	0.7	23.4	0.7	23.4	ns
t_PHL	B	A	0.9	23.8	0.8	23.6	0.7	23.4	0.7	23.4	ns
t_PHZ	OE	A	1.6	29.6	1.5	29.4	1.5	29.3	1.4	29.2	ns
t_PLZ	OE	A	1.6	29.6	1.5	29.4	1.5	29.3	1.4	29.2	ns
t_PHZ	OE	B	2.4	32.2	1.9	13.1	1.7	12	1.3	10.3	ns
t_PLZ	OE	B	2.4	32.2	1.9	13.1	1.7	12	1.3	10.3	ns
t_PZH	OE	A	0.4	24	0.4	23.8	0.4	23.7	0.4	23.7	ns
t_PZL	OE	A	0.4	24	0.4	23.8	0.4	23.7	0.4	23.7	ns
t_PZH	OE	B	1.8	32	1.6	16	1.2	12.6	0.9	10.8	ns
t_PZL	OE	B	1.8	32	1.6	16	1.2	12.6	0.9	10.8	ns

7.7 Switching Characteristics: V_CCA = 2.5 V ±0.2 V

over recommended operating free-air temperature range, V_CCA = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 3)

PARAMETER	FROM (INPUT)	TO (OUTPUT)	V_CCB = 1.8 V ±0.15 V		V_CCB = 2.5 V ±0.2 V		V_CCB = 3.3 V ±0.3 V		V_CCB = 5 V 0.5 V		UNIT
PARAMETER	FROM (INPUT)	TO (OUTPUT)	MIN	MAX	MIN	MAX	MIN	MAX	MIN	MAX	UNIT
t_PLH	A	B	1.6	21.4	1.2	9	0.8	6.2	0.6	4.8	ns
t_PHL	A	B	1.6	21.4	1.2	9	0.8	6.2	0.6	4.8	ns
t_PLH	B	A	1.2	9.3	1	9.1	1	8.9	0.9	8.8	ns
t_PHL	B	A	1.2	9.3	1	9.1	1	8.9	0.9	8.8	ns
t_PHZ	OE	A	1.4	9	1.4	9	1.4	9	1.4	9	ns
t_PLZ	OE	A	1.4	9	1.4	9	1.4	9	1.4	9	ns
t_PHZ	OE	B	2.3	29.6	1.8	11	1.7	9.3	0.9	6.9	ns
t_PLZ	OE	B	2.3	29.6	1.8	11	1.7	9.3	0.9	6.9	ns
t_PZH	OE	A	1	10.9	1	10.9	1	10.9	1	10.9	ns
t_PZL	OE	A	1	10.9	1	10.9	1	10.9	1	10.9	ns
t_PZH	OE	B	1.7	28.2	1.6	12.9	1.2	9.4	1	6.9	ns
t_PZL	OE	B	1.7	28.2	1.6	12.9	1.2	9.4	1	6.9	ns

7.8 Switching Characteristics: V_CCA = 3.3 V ±0.3 V

over recommended operating free-air temperature range, V_CCA = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 3)

PARAMETER	FROM (INPUT)	TO (OUTPUT)	V_CCB = 1.8 V ±0.15 V		V_CCB = 2.5 V ±0.2 V		V_CCB = 3.3 V ±0.3 V		V_CCB = 5 V ±0.5 V		UNIT
PARAMETER	FROM (INPUT)	TO (OUTPUT)	MIN	MAX	MIN	MAX	MIN	MAX	MIN	MAX	UNIT
t_PLH	A	B	1.5	21.2	1.1	8.8	0.8	6.1	0.5	4.4	ns
t_PHL	A	B	1.5	21.2	1.1	8.8	0.8	6.1	0.5	4.4	ns
t_PLH	B	A	0.9	7.2	0.8	6.2	0.7	6.1	0.6	6	ns
t_PHL	B	A	0.9	7.2	0.8	6.2	0.7	6.1	0.6	6	ns
t_PHZ	OE	A	1.6	8.2	1.6	8.2	1.6	6.2	1.6	8.2	ns
t_PLZ	OE	A	1.6	8.2	1.6	8.2	1.6	6.2	1.6	8.2	ns
t_PHZ	OE	B	2.1	29	1.7	10.3	1.5	8.6	0.8	6.3	ns
t_PLZ	OE	B	2.1	29	1.7	10.3	1.5	8.6	0.8	6.3	ns
t_PZH	OE	A	0.8	7.8	0.8	7.8	0.8	7.8	0.8	7.8	ns
t_PZL	OE	A	0.8	7.8	0.8	7.8	0.8	7.8	0.8	7.8	ns
t_PZH	OE	B	1.6	27.7	1.4	12.4	1.1	8.5	0.9	8.4	ns
t_PZL	OE	B	1.6	27.7	1.4	12.4	1.1	8.5	0.9	8.4	ns

7.9 Switching Characteristics: V_CCA = 5 V ±0.5 V

over recommended operating free-air temperature range, V_CCA = 5 V ± 0.5 V (unless otherwise noted) (see Figure 3)

PARAMETER	FROM (INPUT)	TO (OUTPUT)	V_CC = 1.8 V ±0.15 V		V_CC = 2.5 V ±0.2 V		V_CC = 3.3 V ±0.3 V		V_CC = 5 V ±0.5 V		UNIT
PARAMETER	FROM (INPUT)	TO (OUTPUT)	MIN	MAX	MIN	MAX	MIN	MAX	MIN	MAX	UNIT
t_PLH	A	B	1.6	21.4	1	8.8	0.7	6	0.4	4.2	ns
t_PHL	A	B	1.6	21.4	1	8.8	0.7	6	0.4	4.2	ns
t_PLH	B	A	0.7	6.8	0.4	4.8	0.3	4.5	0.3	4.3	ns
t_PHL	B	A	0.7	6.8	0.4	4.8	0.3	4.5	0.3	4.3	ns
t_PHZ	OE	A	0.3	5.4	0.3	5.4	0.3	5.4	0.3	6.4	ns
t_PLZ	OE	A	0.3	5.4	0.3	5.4	0.3	5.4	0.3	6.4	ns
t_PHZ	OE	B	2	28.7	1.6	9.7	1.4	8	0.7	5.7	ns
t_PLZ	OE	B	2	28.7	1.6	9.7	1.4	8	0.7	5.7	ns
t_PZH	OE	A	0.7	5.5	0.7	5.5	0.7	5.5	0.7	5.5	ns
t_PZL	OE	A	0.7	5.5	0.7	5.5	0.7	5.5	0.7	5.5	ns
t_PZH	OE	B	1.6	27.6	1.3	11.4	1	8.1	0.9	6	ns
t_PZL	OE	B	1.6	27.6	1.3	11.4	1	8.1	0.9	6	ns

7.10 Operating Characteristics

T_A = 25°C

PARAMETER		TEST CONDITIONS	V_CCA = V_CCB = 1.8 V	V_CCA = V_CCB = 2.5 V	V_CCA = V_CCB = 3.3 V	V_CCA = V_CCB = 5 V	UNIT
PARAMETER		TEST CONDITIONS	TYP	TYP	TYP	TYP	UNIT
C_pdA⁽¹⁾	A-port input, B-port output	C_L = 0, f = 10 MHz, t_r = t_f = 1 ns	2	2	2	3	pF
C_pdA⁽¹⁾	B-port input, A-port output		18	19	19	22
C_pdB⁽¹⁾	A-port input, B-port output		18	19	20	22
C_pdB⁽¹⁾	B-port input, A-port output		2	2	2	2

(1) Power dissipation capacitance per transceiver. Refer to the TI application report, CMOS Power Consumption and Cpd Calculation, SCAA035

7.11 Typical Characteristics

Figure 1. V_OL Voltage vs I_OL Current

Figure 2. V_OH Voltage vs I_OH Current

8 Parameter Measurement Information

Figure 3. Load Circuit and Voltage Waveforms