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This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
The SN74LVC16T245 device is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
SN74LVC16T245 | TSSOP (48) | 12.50 mm × 6.10 mm |
TVSOP (48) | 9.70 mm × 4.40 mm | |
SSOP (48) | 15.88 mm × 7.49 mm | |
BGA MICROSTAR JUNIOR (56) | 7.00 mm × 4.50 mm |
Changes from A Revision (October 2005) to B Revision
The SN74LVC16T245 control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | DGG / DGV | GQL / ZQL | ||
1A1 | 47 | B5 | I/O | Input/Output. Referenced to VCCA |
1A2 | 46 | B6 | I/O | Input/Output. Referenced to VCCA |
1A3 | 44 | C5 | I/O | Input/Output. Referenced to VCCA |
1A4 | 43 | C6 | I/O | Input/Output. Referenced to VCCA |
1A5 | 41 | D5 | I/O | Input/Output. Referenced to VCCA |
1A6 | 40 | D6 | I/O | Input/Output. Referenced to VCCA |
1A7 | 38 | E5 | I/O | Input/Output. Referenced to VCCA |
1A8 | 37 | E6 | I/O | Input/Output. Referenced to VCCA |
1B1 | 2 | B2 | I/O | Input/Output. Referenced to VCCB |
1B2 | 3 | B1 | I/O | Input/Output. Referenced to VCCB |
1B3 | 5 | C2 | I/O | Input/Output. Referenced to VCCB |
1B4 | 6 | C1 | I/O | Input/Output. Referenced to VCCB |
1B5 | 8 | D2 | I/O | Input/Output. Referenced to VCCB |
1B6 | 9 | D1 | I/O | Input/Output. Referenced to VCCB |
1B7 | 11 | E2 | I/O | Input/Output. Referenced to VCCB |
1B8 | 12 | E1 | I/O | Input/Output. Referenced to VCCB |
1DIR | 1 | A1 | I | Direction-control signal |
1OE | 48 | A6 | I | Tri-State output-mode enables. Pull OE high to place all outputs in Tri-State mode. Referenced to VCCA |
2A1 | 36 | F6 | I/O | Input/Output. Referenced to VCCA |
2A2 | 35 | F5 | I/O | Input/Output. Referenced to VCCA |
2A3 | 33 | G6 | I/O | Input/Output. Referenced to VCCA |
2A4 | 32 | G5 | I/O | Input/Output. Referenced to VCCA |
2A5 | 30 | H6 | I/O | Input/Output. Referenced to VCCA |
2A6 | 29 | H5 | I/O | Input/Output. Referenced to VCCA |
2A7 | 27 | J6 | I/O | Input/Output. Referenced to VCCA |
2A8 | 26 | J5 | I/O | Input/Output. Referenced to VCCA |
2B1 | 13 | F1 | I/O | Input/Output. Referenced to VCCB |
2B2 | 14 | F2 | I/O | Input/Output. Referenced to VCCB |
2B3 | 16 | G1 | I/O | Input/Output. Referenced to VCCB |
2B4 | 17 | G2 | I/O | Input/Output. Referenced to VCCB |
2B5 | 19 | H1 | I/O | Input/Output. Referenced to VCCB |
2B6 | 20 | H2 | I/O | Input/Output. Referenced to VCCB |
2B7 | 22 | J1 | I/O | Input/Output. Referenced to VCCB |
2B8 | 23 | J2 | I/O | Input/Output. Referenced to VCCB |
2DIR | 24 | K1 | I | Direction-control signal |
2OE | 25 | K6 | I | Tri-State output-mode enables. Pull OE high to place all outputs in Tri-State mode. Referenced to VCCA |
GND | 4 | B3 | — | Ground |
B4 | ||||
10 | D3 | |||
15 | D4 | |||
21 | G3 | |||
28 | G4 | |||
34 | J3 | |||
45 | J4 | |||
NC(1) | — | A2 | — | |
A3 | ||||
A4 | ||||
A5 | ||||
K2 | ||||
K3 | ||||
K4 | ||||
K5 | ||||
VCCA | 31 | C4 | — | A-port supply. 1.65 V ≤ VCCA≤ 5.5 V |
42 | H4 | |||
VCCB | 7 | C3 | — | B-port supply. 1.65 V ≤ VCCB≤ 5.5 V |
18 | H3 |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VCCA
VCCB |
Supply voltage | –0.5 | 6.5 | V | |
VI | Input voltage(2) | I/O ports (A port) | –0.5 | 6.5 | V |
I/O ports (B port) | –0.5 | 6.5 | |||
Control inputs | –0.5 | 6.5 | |||
VO | Voltage applied to any output in the high-impedance or power-off state(2) |
A port | –0.5 | 6.5 | V |
B port | –0.5 | 6.5 | |||
VO | Voltage applied to any output in the high or low state(2)(3) | A port | –0.5 | VCCA + 0.5 | V |
B port | –0.5 | VCCB + 0.5 | |||
IIK | Input clamp current | VI < 0 | –50 | mA | |
IOK | Output clamp current | VO < 0 | –50 | mA | |
IO | Continuous output current | ±50 | mA | ||
Continuous current through each VCCA, VCCB, and GND | ±100 | mA | |||
TJ | Junction temperature | -40 | 150 | °C | |
Tstg | Storage temperature | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1000 | |||
Machine model (A115-A) | ±200 |
VCCI | VCCO | MIN | MAX | UNIT | |||
---|---|---|---|---|---|---|---|
VCCA | Supply voltage | 1.65 | 5.5 | V | |||
VCCB | 1.65 | 5.5 | |||||
VIH | High-level input voltage |
Data inputs(5) | 1.65 V to 1.95 V | VCCI × 0.65 | V | ||
2.3 V to 2.7 V | 1.7 | ||||||
3 V to 3.6 V | 2 | ||||||
4.5 V to 5.5 V | VCCI × 0.7 | ||||||
VIL | Low-level input voltage |
Data inputs(5) | 1.65 V to 1.95 V | VCCI × 0.35 | V | ||
2.3 V to 2.7 V | 0.7 | ||||||
3 V to 3.6 V | 0.8 | ||||||
4.5 V to 5.5 V | VCCI × 0.3 | ||||||
VIH | High-level input voltage |
Control inputs (referenced to VCCA)(6) |
1.65 V to 1.95 V | VCCA × 0.65 | V | ||
2.3 V to 2.7 V | 1.7 | ||||||
3 V to 3.6 V | 2 | ||||||
4.5 V to 5.5 V | VCCA × 0.7 | ||||||
VIL | Low-level input voltage |
Control inputs (referenced to VCCA)(6) |
1.65 V to 1.95 V | VCCA × 0.35 | V | ||
2.3 V to 2.7 V | 0.7 | ||||||
3 V to 3.6 V | 0.8 | ||||||
4.5 V to 5.5 V | VCCA × 0.3 | ||||||
VI | Input voltage | Control inputs | 0 | 5.5 | V | ||
VI/O | Input/output voltage | Active state | 0 | VCCO | V | ||
Tri-State | 0 | 5.5 | |||||
IOH | High-level output current | 1.65 V to 1.95 V | –4 | mA | |||
2.3 V to 2.7 V | –8 | ||||||
3 V to 3.6 V | –24 | ||||||
4.5 V to 5.5 V | –32 | ||||||
IOL | Low-level output current | 1.65 V to 1.95 V | 4 | mA | |||
2.3 V to 2.7 V | 8 | ||||||
3 V to 3.6 V | 24 | ||||||
4.5 V to 5.5 V | 32 | ||||||
Δt/Δv | Input transition rise or fall rate |
Data inputs | 1.65 V to 1.95 V | 20 | ns/V | ||
2.3 V to 2.7 V | 20 | ||||||
3 V to 3.6 V | 10 | ||||||
4.5 V to 5.5 V | 5 | ||||||
TA | Operating free-air temperature | –40 | 85 | °C |
THERMAL METRIC(1) | SN74LVC16T245 | UNIT | ||||
---|---|---|---|---|---|---|
DL (SSOP) | DGG (TSSOP) | DGV (TVSOP) | GQL / ZQL (BGA) | |||
48 PINS | 48 PINS | 48 PINS | 56 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 92.9 | 60 | 82.5 | 64.6 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 29.5 | 13.9 | 34.2 | 16.6 | °C/W |
RθJB | Junction-to-board thermal resistance | 35.5 | 27.1 | 45.1 | 30.8 | °C/W |
ψJT | Junction-to-top characterization parameter | 8.1 | 0.5 | 2.7 | 0.9 | °C/W |
ψJB | Junction-to-board characterization parameter | 34.9 | 26.8 | 44.6 | 64.6 | °C/W |
PARAMETER | TEST CONDITIONS | VCCA | VCCB | TA = 25°C | TA = –40°C to 85°C | UNIT | |||||
---|---|---|---|---|---|---|---|---|---|---|---|
MIN | TYP | MAX | MIN | MAX | |||||||
VOH | IOH = –100 μA, | VI = VIH | 1.65 V to 4.5 V | 1.65 V to 4.5 V | VCCO – 0.1 | V | |||||
IOH = –4 mA, | VI = VIH | 1.65 V | 1.65 V | 1.2 | |||||||
IOH = –8 mA, | VI = VIH | 2.3 V | 2.3 V | 1.9 | |||||||
IOH = –24 mA, | VI = VIH | 3 V | 3 V | 2.4 | |||||||
IOH = –32 mA, | VI = VIH | 4.5 V | 4.5 V | 3.8 | |||||||
VOL | IOL = 100 μA, | VI = VIL | 1.65 V to 4.5 V | 1.65 V to 4.5 V | 0.1 | V | |||||
IOL = 4 mA, | VI = VIL | 1.65 V | 1.65 V | 0.45 | |||||||
IOL = 8 mA, | VI = VIL | 2.3 V | 2.3 V | 0.3 | |||||||
IOL = 24 mA, | VI = VIL | 3 V | 3 V | 0.55 | |||||||
IOL = 32 mA, | VI = VIL | 4.5 V | 4.5 V | 0.55 | |||||||
II | Control inputs | VI = VCCA or GND | 1.65 V to 5.5 V | 1.65 V to 5.5 V | ±1 | ±2 | μA | ||||
Ioff | A or B port |
VI or VO = 0 to 5.5 V | 0 V | 0 to 5.5 V | ±1 | ±2 | μA | ||||
0 to 5.5 V | 0 V | ±1 | ±2 | ||||||||
IOZ | A or B port |
VO = VCCO or GND, OE = VIH |
1.65 V to 5.5 V | 1.65 V to 5.5 V | ±1 | ±2 | μA | ||||
ICCA | VI = VCCI or GND, IO = 0 |
1.65 V to 5.5 V | 1.65 V to 5.5 V | 20 | μA | ||||||
5 V | 0 V | 20 | |||||||||
0 V | 5 V | –2 | |||||||||
ICCB | VI = VCCI or GND, IO = 0 |
1.65 V to 5.5 V | 1.65 V to 5.5 V | 20 | μA | ||||||
5 V | 0 V | –2 | |||||||||
0 V | 5 V | 20 | |||||||||
ICCA + ICCB | VI = VCCI or GND, IO = 0 |
1.65 V to 5.5 V | 1.65 V to 5.5 V | 30 | μA | ||||||
ΔICCA | A port | One A port at VCCA – 0.6 V, DIR at VCCA, B port = open |
3 V to 5.5 V | 3 V to 5.5 V | 50 | μA | |||||
DIR | DIR at VCCA – 0.6 V, B port = open, A port at VCCA or GND |
50 | |||||||||
ΔICCB | B port | One B port at VCCB – 0.6 V, DIR at GND, A port = open |
3 V to 5.5 V | 3 V to 5.5 V | 50 | μA | |||||
Ci | Control inputs |
VI = VCCA or GND | 3.3 V | 3.3 V | 4 | 5 | pF | ||||
Cio | A or B port |
VO = VCCA/B or GND | 3.3 V | 3.3 V | 8.5 | 10 | pF |
PARAMETER | FROM (INPUT) |
TO (OUTPUT) |
VCCB = 1.8 V ±0.15 V |
VCCB = 2.5 V ±0.2 V |
VCCB = 3.3 V ±0.3 V |
VCCB = 5 V ±0.5 V |
UNIT | ||||
---|---|---|---|---|---|---|---|---|---|---|---|
MIN | MAX | MIN | MAX | MIN | MAX | MIN | MAX | ||||
tPLH | A | B | 1.7 | 21.9 | 1.3 | 9.2 | 1 | 7.4 | 0.8 | 7.1 | ns |
tPHL | |||||||||||
tPLH | B | A | 0.9 | 23.8 | 0.8 | 23.6 | 0.7 | 23.4 | 0.7 | 23.4 | ns |
tPHL | |||||||||||
tPHZ | OE | A | 1.6 | 29.6 | 1.5 | 29.4 | 1.5 | 29.3 | 1.4 | 29.2 | ns |
tPLZ | |||||||||||
tPHZ | OE | B | 2.4 | 32.2 | 1.9 | 13.1 | 1.7 | 12 | 1.3 | 10.3 | ns |
tPLZ | |||||||||||
tPZH | OE | A | 0.4 | 24 | 0.4 | 23.8 | 0.4 | 23.7 | 0.4 | 23.7 | ns |
tPZL | |||||||||||
tPZH | OE | B | 1.8 | 32 | 1.6 | 16 | 1.2 | 12.6 | 0.9 | 10.8 | ns |
tPZL |
PARAMETER | FROM (INPUT) |
TO (OUTPUT) |
VCCB = 1.8 V ±0.15 V |
VCCB = 2.5 V ±0.2 V |
VCCB = 3.3 V ±0.3 V |
VCCB = 5 V 0.5 V |
UNIT | ||||
---|---|---|---|---|---|---|---|---|---|---|---|
MIN | MAX | MIN | MAX | MIN | MAX | MIN | MAX | ||||
tPLH | A | B | 1.6 | 21.4 | 1.2 | 9 | 0.8 | 6.2 | 0.6 | 4.8 | ns |
tPHL | |||||||||||
tPLH | B | A | 1.2 | 9.3 | 1 | 9.1 | 1 | 8.9 | 0.9 | 8.8 | ns |
tPHL | |||||||||||
tPHZ | OE | A | 1.4 | 9 | 1.4 | 9 | 1.4 | 9 | 1.4 | 9 | ns |
tPLZ | |||||||||||
tPHZ | OE | B | 2.3 | 29.6 | 1.8 | 11 | 1.7 | 9.3 | 0.9 | 6.9 | ns |
tPLZ | |||||||||||
tPZH | OE | A | 1 | 10.9 | 1 | 10.9 | 1 | 10.9 | 1 | 10.9 | ns |
tPZL | |||||||||||
tPZH | OE | B | 1.7 | 28.2 | 1.6 | 12.9 | 1.2 | 9.4 | 1 | 6.9 | ns |
tPZL |
PARAMETER | FROM (INPUT) |
TO (OUTPUT) |
VCCB = 1.8 V ±0.15 V |
VCCB = 2.5 V ±0.2 V |
VCCB = 3.3 V ±0.3 V |
VCCB = 5 V ±0.5 V |
UNIT | ||||
---|---|---|---|---|---|---|---|---|---|---|---|
MIN | MAX | MIN | MAX | MIN | MAX | MIN | MAX | ||||
tPLH | A | B | 1.5 | 21.2 | 1.1 | 8.8 | 0.8 | 6.1 | 0.5 | 4.4 | ns |
tPHL | |||||||||||
tPLH | B | A | 0.9 | 7.2 | 0.8 | 6.2 | 0.7 | 6.1 | 0.6 | 6 | ns |
tPHL | |||||||||||
tPHZ | OE | A | 1.6 | 8.2 | 1.6 | 8.2 | 1.6 | 6.2 | 1.6 | 8.2 | ns |
tPLZ | |||||||||||
tPHZ | OE | B | 2.1 | 29 | 1.7 | 10.3 | 1.5 | 8.6 | 0.8 | 6.3 | ns |
tPLZ | |||||||||||
tPZH | OE | A | 0.8 | 7.8 | 0.8 | 7.8 | 0.8 | 7.8 | 0.8 | 7.8 | ns |
tPZL | |||||||||||
tPZH | OE | B | 1.6 | 27.7 | 1.4 | 12.4 | 1.1 | 8.5 | 0.9 | 8.4 | ns |
tPZL |
PARAMETER | FROM (INPUT) |
TO (OUTPUT) |
VCC = 1.8 V ±0.15 V |
VCC = 2.5 V ±0.2 V |
VCC = 3.3 V ±0.3 V |
VCC = 5 V ±0.5 V |
UNIT | ||||
---|---|---|---|---|---|---|---|---|---|---|---|
MIN | MAX | MIN | MAX | MIN | MAX | MIN | MAX | ||||
tPLH | A | B | 1.6 | 21.4 | 1 | 8.8 | 0.7 | 6 | 0.4 | 4.2 | ns |
tPHL | |||||||||||
tPLH | B | A | 0.7 | 6.8 | 0.4 | 4.8 | 0.3 | 4.5 | 0.3 | 4.3 | ns |
tPHL | |||||||||||
tPHZ | OE | A | 0.3 | 5.4 | 0.3 | 5.4 | 0.3 | 5.4 | 0.3 | 6.4 | ns |
tPLZ | |||||||||||
tPHZ | OE | B | 2 | 28.7 | 1.6 | 9.7 | 1.4 | 8 | 0.7 | 5.7 | ns |
tPLZ | |||||||||||
tPZH | OE | A | 0.7 | 5.5 | 0.7 | 5.5 | 0.7 | 5.5 | 0.7 | 5.5 | ns |
tPZL | |||||||||||
tPZH | OE | B | 1.6 | 27.6 | 1.3 | 11.4 | 1 | 8.1 | 0.9 | 6 | ns |
tPZL |
PARAMETER | TEST CONDITIONS |
VCCA = VCCB = 1.8 V |
VCCA = VCCB = 2.5 V |
VCCA = VCCB = 3.3 V |
VCCA = VCCB = 5 V |
UNIT | |
---|---|---|---|---|---|---|---|
TYP | TYP | TYP | TYP | ||||
CpdA(1) | A-port input, B-port output | CL = 0, f = 10 MHz, tr = tf = 1 ns |
2 | 2 | 2 | 3 | pF |
B-port input, A-port output | 18 | 19 | 19 | 22 | |||
CpdB(1) | A-port input, B-port output | 18 | 19 | 20 | 22 | ||
B-port input, A-port output | 2 | 2 | 2 | 2 |
The SN74LVC16T245 is a 16-bit, dual-supply noninverting bidirectional voltage level translation. Pins A and control pins (DIR and OE) are supported by VCCA and pins B are supported by VCCB. The A port is able to accept I/O voltages ranging from 1.65 V to 5.5 V, while the B port can accept I/O voltages from 1.65 V to 5.5 V. A high on DIR allows data transmission from A to B and a low on DIR allows data transmission from B to A when OE is set to low. When OE is set to high, both A and B are in the high-impedance state.
This device is fully specified for partial-power-down applications using off output current (Ioff).
The VCC isolation feature ensures that if either VCC input is at GND, both ports are put in a high-impedance state.
Both VCCA and VCCB can be supplied at any voltage from 1.65 V to 5.5 V making the device suitable for translating between any of the low voltage nodes (1.8-V, 2.5-V, and 3.3-V).
SN74LVC16T245 can support high data rate application. Data rates can be calculated form the maximum propagation delay. This is also dependant on the output load. For example, for a 3.3-V to 5-V conversion, the maximum frequency is 200 MHz.
This device is fully specified for partial-power-down applications using off output current (Ioff). Ioff will prevent backflow current by disabling I/O output circuits when device is in partial power-down mode.
The VCC isolation feature ensures that if either VCCA or VCCB are at GND, both ports will be in a high-impedance state (IOZ shown in Electrical Characteristics). This prevents false logic levels from being presented to either bus.
The functional modes for the SN74LVC16T245 device are shown in Table 1.
CONTROL INPUTS | OUTPUT CIRCUITS | OPERATION | ||
---|---|---|---|---|
OE | DIR | A PORT | B PORT | |
L | L | Enabled | Hi-Z | B data to A bus |
L | H | Hi-Z | Enabled | A data to B bus |
H | X | Hi-Z | Hi-Z | Isolation |
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The SN74LVC16T245 device can be used in level-shifting applications for interfacing devices and addressing mixed voltage incompatibility. The SN74LVC16T245 device is ideal for data transmission where direction is different for each channel.
Calculate the enable times for the SN74LV16T245 using the following formulas:
In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected. For example, if the SN74LVC16T245 initially is transmitting from A to B, then the DIR bit is switched; the B port of the device must be disabled before presenting it with an input. After the B port has been disabled, an input signal applied to it appears on the corresponding A port after the specified propagation delay.
This device uses drivers which are enabled depending on the state of the DIR pin. The designer must know the intended flow of data and take care not to violate any of the high or low logic levels. It is important that unused data inputs not be floating, as this can cause excessive internal leakage on the input CMOS structure. Make sure to tie any unused input and output ports directly to ground. For this design example, use the parameters listed in Table 2.
DESIGN PARAMETERS | EXAMPLE VALUE | |||
---|---|---|---|---|
Input voltage range | 1.65 V to 5.5 V | |||
Output voltage | 1.65 V to 5.5 V |
To begin the design process, determine the following:
The SN74LVC16T245 device uses two separate configurable power-supply rails, VCCA and VCCB. VCCA accepts any supply voltage from 1.65 V to 5.5 V and VCCB accepts any supply voltage from 1.65 V to 5.5 V. The A port and B port are designed to track VCCA and VCCB, respectively, allowing for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V and 3.3-V voltage nodes.
The output-enable OE input circuit is supplied by VCCA and when the OE input is high, all outputs are placed in the high-impedance state. To ensure the high-impedance state of the outputs during power up or power down, the OE input pin must be tied to VCCA through a pullup resistor and must not be enabled until VCCA and VCCB are fully ramped and stable. The minimum value of the pullup resistor to VCCA is determined by the current-sinking capability of the driver.
To ensure reliability of the device, following common printed-circuit-board layout guidelines is recommended.
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI's goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or "enhanced plastic" are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
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