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  • SN74LVC2244A Octal Buffer/Driver With 3-State Outputs

    • SCAS572L April   1996  – July 2014 SN74LVC2244A

      PRODUCTION DATA.  

  • CONTENTS
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  • SN74LVC2244A Octal Buffer/Driver With 3-State Outputs
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics, -40°C to 85°C
    7. 7.7 Switching Characteristics, -40°C to 125°C
    8. 7.8 Operating Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
  14. IMPORTANT NOTICE

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DATA SHEET

SN74LVC2244A Octal Buffer/Driver With 3-State Outputs

1 Features

  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 5.5 ns at 3.3 V
  • Output Ports Have Equivalent 26-Ω Series Resistors, So No External Resistors Are Required
  • Typical VOLP (Output Ground Bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    >2 V at VCC = 3.3 V, TA = 25°C
  • Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage
    With 3.3-V VCC)
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

2 Applications

  • Wearable Health and Fitness Devices
  • Network Switches
  • Servers
  • Tests and Measurements

3 Description

The SN74LVC2244A octal buffer/line driver is designed for 1.65-V to 3.6-V VCC operation.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN74LVC2244A SSOP (20) 7.20 mm × 5.30 mm
SSOP (20) 8.65 mm × 3.90 mm
TVSOP (20) 5.00 mm × 4.40 mm
SOIC (20) 12.80 mm × 7.50 mm
TSSOP (20) 6.50 mm × 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

4 Simplified Schematic

ld_cas572.gif

5 Revision History

Changes from K Revision (March 2005) to L Revision

  • Updated document to new TI data sheet standards.Go
  • Deleted Ordering Information table.Go
  • Changed Ioff bullet in Features list.Go
  • Added Applications.Go
  • Added Pin Functions table.Go
  • Added Handling Ratings table.Go
  • Changed MAX ambient temperature to 125°C in Recommended Operating Conditions. Go
  • Added Thermal Information table.Go
  • Added –40°C to 125°C temperature range in Electrical Characteristics table.Go
  • Added data to Switching Characteristics, –40°C to 85°C.Go
  • Added Switching Characteristics table, –40°C to 125°C. Go
  • Changed Operating Characteristics table.Go
  • Added Typical Characteristics.Go
  • Added Detailed Description section.Go
  • Added Application and Implementation section.Go

6 Pin Configuration and Functions

po_cas572.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 1OE I Output Enable 1
2 1A1 I 1A1 Input
3 2Y4 O 2Y4 Output
4 1A2 I 1A2 Input
5 2Y3 O 2Y3 Output
6 1A3 I 1A3 Input
7 2Y2 O 2Y2 Output
8 1A4 I 1A4 Input
9 2Y1 O 2Y1 Output
10 GND — Ground Pin
11 2A1 I 2A1 Input
12 1Y4 O 1Y4 Output
13 2A2 I 2A2 Input
14 1Y3 O 1Y3 Output
15 2A3 I 2A3 Input
16 1Y2 O 1Y2 Output
17 2A4 I 2A4 Input
18 1Y1 O 1Y1 Output
19 2OE I Output Enable 2
20 VCC — Power Pin

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage range –0.5 6.5 V
VI Input voltage range(2) –0.5 6.5 V
VO Voltage range applied to any output in the high-impedance or power-off state(2) –0.5 6.5 V
VO Voltage range applied to any output in the high or low state(2)(3) –0.5 VCC + 0.5 V
IIK Input clamp current VI < 0 –50 mA
IOK Output clamp current VO < 0 –50 mA
IO Continuous output current ±50 mA
Continuous current through VCC or GND ±100 mA
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of VCC is provided in the Recommended Operating Conditions table.

7.2 Handling Ratings

MIN MAX UNIT
Tstg Storage temperature range –65 150 °C
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) 0 2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) 0 1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage Operating 1.65 3.6 V
Data retention only 1.5
VIH High-level input voltage VCC = 1.65 V to 1.95 V 0.65 × VCC V
VCC = 2.3 V to 2.7 V 1.7
VCC = 2.7 V to 3.6 V 2
VIL Low-level input voltage VCC = 1.65 V to 1.95 V 0.35 × VCC V
VCC = 2.3 V to 2.7 V 0.7
VCC = 2.7 V to 3.6 V 0.8
VI Input voltage 0 5.5 V
VO Output voltage High or low state 0 VCC V
3-state 0 5.5
IOH High-level output current VCC = 1.65 V –2 mA
VCC = 2.3 V –4
VCC = 2.7 V –8
VCC = 3 V –12
IOL Low-level output current VCC = 1.65 V 2 mA
VCC = 2.3 V 4
VCC = 2.7 V 8
VCC = 3 V 12
Δt/Δv Input transition rise or fall rate 10 ns/V
TA Operating free-air temperature –40 125 °C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004).

7.4 Thermal Information

THERMAL METRIC(1) SN74LVC2244A UNIT
DB DBQ DGV DW NS PW
20 PINS
RθJA Junction-to-ambient thermal resistance 94.5 94.7 114.7 88.3 74.7 102.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 56.2 47.9 29.8 51.1 40.5 35.9
RθJB Junction-to-board thermal resistance 49.7 45.0 56.2 50.9 42.3 53.5
ψJT Junction-to-top characterization parameter 18.1 11.0 0.8 20.0 14.3 2.2
ψJB Junction-to-board characterization parameter 49.5 44.6 55.5 50.5 41.9 52.9
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a n/a n/a n/a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).

7.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC –40°C to 85°C –40°C to 125°C UNIT
MIN TYP(1) MAX MIN TYP(1) MAX
VOH IOH = –100 μA 1.65 V to
3.6 V		 VCC – 0.2 VCC – 0.2 V
IOH = –2 mA 1.65 V 1.2 1.2
IOH = –4 mA 2.3 V 1.7 1.7
2.7 V 2.2 2.2
IOH = –6 mA 3 V 2.4 2.4
IOH = –8 mA 2.7 V 2 2
IOH = –12 mA 3 V 2 2
VOL IOL = 100 μA 1.65 V to
3.6 V		 0.2 0.2 V
IOL = 2 mA 1.65 V 0.45 0.45
IOL = 4 mA 2.3 V 0.7 0.7
2.7 V 0.4 0.4
IOL = 6 mA 3 V 0.55 0.55
IOL = 8 mA 2.7 V 0.6 0.6
IOL = 12 mA 3 V 0.8 0.8
II VI = 0 to 5.5 V 3.6 V ±5 ±5 μA
Ioff VI or VO = 5.5 V 0 ±10 ±10 μA
IOZ VO = 0 to 5.5 V 3.6 V ±10 ±10 μA
ICC VI = VCC or GND IO = 0 3.6 V 10 10 μA
3.6 V ≤ VI ≤ 5.5 V(2) 10 10
ΔICC One input at VCC – 0.6 V, Other inputs at VCC or GND 2.7 V to
3.6 V		 500 500 μA
Ci VI = VCC or GND 3.3 V 4 4 pF
Co VO = VCC or GND 3.3 V 5.5 5.5 pF
(1) All typical values are at VCC = 3.3 V, TA = 25°C.
(2) This applies in the disabled state only.

7.6 Switching Characteristics, –40°C to 85°C

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 3)
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 VCC = 1.8 V
± 0.15 V		 VCC = 2.5 V
± 0.2 V		 VCC = 2.7 V VCC = 3.3 V
± 0.3 V		 UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
tpd A Y 10.9 7.9 6.4 1.5 5.5 ns
ten OE Y 12.6 9.6 8.1 1 7.1 ns
tdis OE Y 12.1 7.8 7.3 1.5 6.8 ns

7.7 Switching Characteristics, –40°C to 125°C

over operating free-air temperature range (unless otherwise noted)
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 VCC = 1.8 V
± 0.15 V		 VCC = 2.5 V
± 0.2 V		 VCC = 2.7 V VCC = 3.3 V
± 0.3 V		 UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
tpd A Y 12.4 10 7.1 1.5 6.5 ns
ten OE Y 14.1 11.7 8.5 1 7.8 ns
tdis OE Y 13.6 9.9 7.8 1.5 7.6 ns

7.8 Operating Characteristics

TA = 25°C
PARAMETER TEST
CONDITIONS		 VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V UNIT
TYP TYP TYP
Cpd Power dissipation capacitance
per buffer/driver		 Outputs enabled f = 10 MHz 43 43 46 pF
Outputs disabled 1 1 2

7.9 Typical Characteristics

D001_SCAS572.gif
Figure 1. SN74LVC2244A TPD Across Temperature at 3.3 V
D002_SCAS572.gif
Figure 2. SN74LVC2244A TDP Across VCC at 25°C

8 Detailed Description

8.1 Overview

This octal buffer and line driver is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC2244A device is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. The outputs, which are designed to sink up to 12 mA, include equivalent 26-ohm resistors to reduce overshoot and undershoot.

8.2 Functional Block Diagram

ld_cas572.gif

8.3 Feature Description

  • Wide operating voltage range
    • Operates from 1.65 V to 3.6 V
  • Allows down voltage translation
    • Inputs accept voltages to 5.5 V
  • Ioff Feature
    • Allows voltages on the inputs and outputs when VCC is 0 V

8.4 Device Functional Modes

Table 1. Function Table
(Each Buffer)

INPUTS OUTPUT
Y
OE A
L H H
L L L
H X Z

9 Application and Implementation

9.1 Application Information

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

9.2 Typical Application

app_sche_cas572.gifFigure 4. Typical Application Diagram

9.2.1 Design Requirements

This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads, so routing and load conditions should be considered to prevent ringing.

9.2.2 Detailed Design Procedure

  1. Recommended Input Conditions
    • Rise time and fall time specs: See (Δt/ΔV) in the Recommended Operating Conditions table.
    • Specified high and low levels: See (VIH and VIL) in the Recommended Operating Conditions table.
    • Inputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC.
  2. Recommend Output Conditions
    • Load currents should not exceed 25 mA per output and 50 mA total for the part.
    • Outputs should not be pulled above VCC.

9.2.3 Application Curves

D003_SCAS572.gifFigure 5. ICC vs Frequency

10 Power Supply Recommendations

The power supply can be any voltage between the MIN and MAX supply voltage rating located in the Recommended Operating Conditions table.

Each VCC pin should have a good bypass capacitor to prevent power disturbance. For devices with a single supply, 0.1 μf is recommended; if there are multiple VCC pins, then 0.01 μf or 0.022 μf is recommended for each power pin. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. A 0.1 μf and a 1 μf are commonly used in parallel. The bypass capacitor should be installed as close to the power pin as possible for best results.

11 Layout

11.1 Layout Guidelines

When using multiple-bit logic devices, inputs should never float.

In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such input pins should not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. Figure 6 specifies the rules that must be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should be applied to any particular unused input depends on the function of the device. Generally they will be tied to GND or VCC, whichever makes more sense or is more convenient. It is generally acceptable to float outputs, unless the part is a transceiver. If the transceiver has an output enable pin, it will disable the output section of the part when asserted. This will not disable the input section of the IOs, so they cannot float when disabled.

11.2 Layout Example

layout_cas293.gifFigure 6. Layout Diagram

12 Device and Documentation Support

12.1 Trademarks

All other trademarks are the property of their respective owners.

12.2 Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

12.3 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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