High performance, three-phase inverters operated at 24V to 60V are gaining more traction in emerging industrial applications such as high-efficiency servo drives, and collaborative, surgery, and humanoid robots. Accurate and reliable phase current sensing is crucial in these applications to achieve smooth torque and precise position control. These applications are highly space constrained and the 3-phase inverters are often integrated into the motor. Therefore, a small design size with low profile and the ability to operate at high ambient temperatures up to 125°C are important. In-phase, shunt-based current sensing as shown in Figure 1-1 provides the highest resolution measurement of the motor current and is an industry standard design for high-performance motor drives. TI's newly released AMC0106Mxx functionally isolated modulators in a small, lead-less package enable such measurement in a much smaller design size than what has been achievable so far.

Figure 1-1 48V, 3-Phase Inverter With Shunt-Based, In-Phase Current Sensing

In-line phase current sensing enables higher performance, continuous measurement, and more precise control of the motor phase current over the entire PWM cycle compared to low-side shunt sensing. In a low-side shunt sensing system, the current is discontinuous and the phase current can only be measured during part of the PWM period, when the low-side power switch is turned on. These systems typically result in a less accurate and lower bandwidth phase current closed-loop control. Therefore, in-line phase current sensing is typically the choice for servo drives and robotic applications. However, the phase voltage is pulse-width modulated and periodically switched between GND and the DC-bus voltage, typically 48V. The microcontroller is referred to GND. This means that the phase current sense subsystem needs to handle a high common-mode voltage and high common-mode transients. The slew rate of the common-mode transients are in the range of 10V/ns. With emerging, fast switching GaN-FETs, slew rates are significantly higher. A digital interface between the microcontroller and current sensor is preferable and improves signal integrity and eliminates issues from ground bouncing during switching.

Figure 2-1 shows a simplified diagram of one of the motor phase currents and the corresponding PWM voltage over one PWM cycle. For closed-loop control, it is sufficient to measure the phase current in the center of the PWM. For small PWM duty cycles the rising or falling edge of the PWM switching falls into the sampling window of the delta-sigma ADC. Duty cycle is defined as the ON-time of the high-side FET relative to the PWM period.

An alternative approach is to continuously sample the phase currents at a sampling rate much higher than the PWM frequency. The individual samples are averaged to get an accurate measurement of the average current and eliminate the inherent current ripple. This method also supports fast short-circuit and over-current detection and sample rates up to 2.5Msps are not uncommon. An advanced use case for continuous oversampling is predictive maintenance. For example, analyzing the phase current spectral signature allows detecting the onset of bearing faults.

For both approaches, PWM switching occurs during phase current sampling. Therefore, it is critical that the phase current sensor is immune to high common mode voltage transients, and PWM switching and does not impact measurement accuracy.

Figure 2-1 Current Sampling for Closed-Loop Phase Current Control and Short-Circuit Detection

A current sense subsystem for a high-performance servo drives shall meet the following requirements:

• High accuracy: better than 1%
• High resolution: better than 12 effective number of bits (ENOB)
• Low propagation delay (latency): <20µs
• High common mode voltage: >60V
• High common mode transient immunity (CMTI): >>10V/ns
• Fast short-circuit detection: <2µs
• A digital interface with high immunity against electromagnetic interferences such as conducted RF and fast transient bursts
• Immunity to external magnetic fields
• Small PCB design size and low profile

Several designs exist for in-phase current sensing in space constrained applications where a small form factor and low height are critical. In-package Hall sensors, shunts with non-isolated amplifiers, and shunts with isolated amplifiers or isolated delta-sigma modulators are just a few of them.

Shunt-based current sensing with a delta-sigma modulator offers the highest measurement resolution and is the method of choice for high-performance motor drives. The digital interface to the microcontroller offers the additional benefit of high EMC immunity. For <60V operation functional isolation is sufficient. Figure 3-1 shows a simplified block diagram of a shunt, a 8-pin, functionally isolated, modulator, and a microcontroller connected to the delta-sigma modulator through a two-wire interface for clock and data. The microcontroller contains a digital low-pass filter, such as a sync³ filter, that also converts the 1-bit data stream at a high sampling rate into a higher-bit data word at a lower rate (decimation).

Figure 3-1 Isolated Phase Current Sense Subsystem with MCU Integrated Sync Filter

The AMC0106Mxx are precision, functionally isolated, second-order delta-sigma modulators designed for shunt-based current sensing. The M05 version supports a linear input range of ±50mV. The M25 supports a linear input range of ±250mV. The isolation barrier separates parts of the system that operate on different common-mode voltage levels. A typical application is phase current sensing in high-performance servo drives. The isolation barrier supports a working voltage up to 200V_RMS / 280V_DC and transient over voltages up to 570V_RMS / 800V_DC.

The sigma-delta modulator on the hot side receives a clock from the cold side. The modulator translates the analog input signal into a bit stream of digital ones and zeros that is synchronous to the clock. The digital bit stream is transferred back to the cold side across the galvanic isolation barrier and output on the DOUT pin. The time average of the bit stream is proportional to the analog input voltage. The block diagram of the AMC0106Mxx is shown in Figure 3-2.

Figure 3-2 AMC0106Mxx Block Diagram

The modulator bit stream contains high frequency quantization noise. Therefore the bit stream is processed by a digital low-pass filter to increase measurement resolution. Many micro control units (MCUs) support delta-sigma filtering with a dedicated peripheral block, such as the Sigma-Delta Filter Module (SDFM) integrated with the C2000™ and Sitara™ microcontrollers. Alternatively, the digital filter is implemented in a field-programmable gate array (FPGA).

Isolates sigma-delta modulators have existed for many years and are an industry standard design for phase current sensing in high-performance motor drives. However, most isolated modulators are designed for high-voltage applications, are reinforced isolated, and come in packages with >8mm clearance distance. The AMC0106Mxx modulators are specifically designed for low-voltage applications, are functionally isolated, and come in a small, 2.7mm x 3.5mm lead-less package with 1mm creepage and clearance. With the small package size, the AMC0106Mxx isolated modulators enable small PCB layouts that are essential for small form-factor motor drives in robotic applications. Figure 3-3 shows a layout comparison between a AMC1306Mxx reinforced isolated modulator and an AMC0106Mxx functionally isolated modulator. The AMC0106Mxx layout consumes only half the PCB area as it's AMC1306Mxx counter part.

Figure 3-3 PCB Size Reduction AMC0106M05 versus AMC1306M05

Figure 3-4 shows the schematic of the phase current sense subsystem using the functionally isolated modulator AMC0106M05 (U8) with a ±50mV linear input voltage range, and a 1mΩ, 3W shunt (R39). The 1mΩ shunt value determines that the linear input range is ±50A. The AMC0106M05 has a ±64mV clipping range, therefore the maximum current range is ±64A. The power dissipation in the shunt at 35A_RMS is 1.25W.

Figure 3-4 AMC0106M05 Schematic Using the LMG2100R44 Bootstrap Supply

The differential anti-aliasing low-pass filter (R41=10Ω, R45=10Ω, C61=10nF) in front of the isolated modulator has a cut-off frequency of 795kHz and helps to improve signal-to-noise performance of the signal path. The purpose of the low-pass filter is to attenuate high-frequency input noise below the desired noise level of the measurement. Without the input filter, noise close the sampling frequency (f_CLKIN), or multiples of the sampling frequency, is aliased to low-frequencies by the delts-sigma modulator and passes through the digital low-pass filter. The capacitors C65=1nF and C66=1nF are optional and improve common-mode input voltage rejection at frequencies above 10MHz. C65 and C66 are sized 10x smaller than C61. For best performance, make sure C65 and C66 values match better than 5%. Mismatch between C65 and C66 causes differential input error during common-mode transients. NP0-type capacitors offer low temperature drift and are preferred for common-mode filtering.

The analog supply AVDD is decoupled with a 100nF capacitor, C56. AVDD is supplied by one of two bootstrap supply options. The default option leverages the LMG2100R044 bootstrap supply with C40=4.7µF and a current limit resistor R15=3Ω. The bootstrap diode is integrated into the LMG2100R044 GaN-FET. The AMC0106M05 typically draws 6.6mA from the AVDD supply. This configuration allows for operating at PWM frequencies from 10kHz to 100kHz with a maximum continuous duty cycle of a round 95%. Refer to the test results for more details.

The resistor R14=0Ω is a configuration option to use a separate bootstrap supply. The resistor consists of an ultra fast rectifier diode D1, a 4.7µF capacitor C57 and a 3Ω current limit resistor R34, not populated with the default option.

The digital supply DVDD is decoupled with the capacitors C58=2.2µF and C59=100nF. A series 0Ω resistor (R37) is a placeholder for an optional ferrite bead. Ferrite beads help reduce coupling of transient load current spikes into the 3.3V plane and therefore improve EMI performance.

A 50Ω series line termination resistor R40 at the AMC0106M05 DOUT pin improves signal integrity. An optional capacitor C62=33pF allows for slew rate reduction of the modulator output bit-stream signal to further reduce EMI. For more information on improving the digital interface from an isolated modulator to a microcontroller refer to Achieving Better Signal Integrity with Isolated Delta-Sigma Modulators in Motor Drives and Clock Edge Delay Compensation With Isolated Modulators Digital Interface to MCUs.

Figure 3-5 shows the layout of the board with the shunt (R39) on the top-side of the PCB and the AMC0106M05 (U8) on the bottom side of the PCB. The shunt’s terminals are connected to through a Kelvin connection to the two series input resistors R41 and R45 on the top layer. On the other side of the resistors, both signals are connected through vias to the corresponding input pins of the AMC0106M05 (INN and INP) that is placed on the bottom layer. The decoupling capacitor C61 is placed as close as possible to the input pins INN and INP and on the same layer as the AMC0106M05. The shunt terminal facing to the U3 LMG2100R044 GaN-FET's switch node (Ph-C) is connected through a via to the analog GND (AGND) pin of the AMC0106M05. The AVDD decoupling cap C56 is placed on the bottom layer close to the AVDD pin and connected to the AGND trace on the same layer.

Figure 3-5 AMC0106M05 Top and Bottom Layer PCB Layout

For testing, a sinc³ filter was implemented on a TMS320F28379D Real-Time Microcontroller. A sinc³ filter is a finite impulse response (FIR) filter with a constant propagation delay (group delay). The propagation delay depends on the sinc filter order, the sample clock frequency, and the oversampling ratio (OSR). For example, a sinc³ filter with an 20MHz sample clock frequency and an oversampling ratio of 64 has a propagation delay of 4.8µs and a cut-off frequency f_-3dB of approximately 80kHz. The corresponding magnitude response and sampling window are shown in Figure 3-6 and Figure 3-7, respectively.

Figure 3-6 Magnitude Response, f_mod = 20MHz, sinc³, OSR=64

Figure 3-7 Sinc³ OSR64 Filter Coefficients

An advantage of the delta-sigma approach is that short-circuit detection can be derived from the same modulator bit-stream by implementing a second decimation filter with a lower OSR and therefore lower latency. For example, a sinc³ filter with an OSR of 8 running at a 20MHz sample rate, has a over-current response time (settling time) of only 1.2µs, as shown in Figure 3-8.

Figure 3-8 Step Response of a Sinc³ OSR 8 Filter

For more details on how to implement sinc filters on a C2000™ microcontroller, see Sigma Delta Filter Module (SDFM).

A picture of the test setup is shown in Figure 4-1. The left side shows the overall setup with the top side view of the 3-phase GaN inverter. The right side shows the area on the bottom side of the PCB where the AMC0106M05 is placed.

In the following measurements phase notation U, V, W is used instead of the phase A, B, C notation used on the PCB design and schematic. For example, phase C on the schematic equals phase W in the measurement.

Figure 4-1 Picture of the Test Setup

Figure 4-2 shows the timing of the digital interface. The AMC0106M05 is clocked at 20MHz. A new data bit is output on the rising edge of clock. The typical delay between the rising edge of clock to the rising (or falling) edge of data is 22ns. For information on how to optimize the setup and hold timing with the microcontroller, refer to Clock Edge Delay Compensation With Isolated Modulators Digital Interface to MCUs.

Figure 4-2 Digital Interface Timing