SCLA045 July 2021 SN74AUP2G00 , SN74AUP2G02 , SN74HCS00 , SN74HCS00-Q1 , SN74HCS02 , SN74HCS02-Q1
An error condition or other digital input might only occur for a very short time while the processor is busy with other tasks or asleep for power savings. In order to ensure that an error state is correctly identified, a dedicated latch circuit can be used to catch even very brief pulses while using very little power.
See more about similar use cases in the Logic Minute video Design an Alarm / Tamper Circuit with an S-R Latch.