SLVAFP9 October   2024 TPS65219 , TPS6521905

1.   1
2.   Abstract
3.   Trademarks
4. 1Introduction
5. 2TPS65219 Overview
6. 3Power Delivery Networks
   1. 3.1 Always ON: Designed for Cost (-1 and -2 Devices)
   2. 3.2 Always On: Designed for Power and or Efficiency (-1L and -2L Devices)
   3. 3.3 Always On: Designed for PL Performance (-3 Devices)
   4. 3.4 Full Power Management Flexibility (All Speed Grade)
7. 4Loading a NVM Configuration File to PMIC
8. 5Summary
9. 6References

Powering Xilinx® Zynq® UltraScale+® MPSoCs With the TPS65219 PMIC