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Design target parameters for the EyeQ4 High core rail power is show in Table 1-1 and typical measurement data is seen in Section 6.
| DESIGN PARAMETER | VALUE |
|---|---|
| VIN | 3.3 V / 5 V (±5%) |
| VOUT | 1 V |
| IOUT | 12 A max (LP875761A-Q1 supports up to 16 A load current) |
| VOUT tolerance | ±3% in all conditions including DC accuracy and load transient |
| Load transient | 8 A/µs, 4 A to 12 A to 4 A |
| CIN(nom) | At least 10 µF capacitor per phase |
| COUT(nom) | 144 µF total capacitance per phase, including point of load capacitors |
| COUT(min) | 100 µF total capacitance per phase, including point of load capacitors |
| COUT(max) | 1500 µF total, all phases combined, including point of load capacitors |
| L (nom) | 330 nH, at least 3.5 A saturation current |
| Phase margin | >45° |
| Gain margin | >10 dB |