SLVSHB3
November 2025
LM51251A-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements
5.7
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Device Configuration (CFG-pin)
6.3.2
Device and Phase Enable/Disable (UVLO/EN, EN2)
6.3.3
Dual Device Operation
6.3.4
Switching Frequency and Synchronization (SYNCIN)
6.3.5
Dual Random Spread Spectrum (DRSS)
6.3.6
Operation Modes (BYPASS, DEM, FPWM)
6.3.7
VCC Regulator, BIAS (BIAS-pin, VCC-pin)
6.3.8
Soft Start (SS-pin)
6.3.9
VOUT Programming (VOUT, ATRK, DTRK)
6.3.10
Protections
6.3.10.1
VOUT Overvoltage Protection (OVP)
6.3.10.2
Thermal Shutdown (TSD)
6.3.11
Fault Indicator (nFAULT-pin)
6.3.12
Slope Compensation (CSP1, CSP2, CSN1, CSN2)
6.3.13
Current Sense Setting and Switch Peak Current Limit (CSP1, CSP2, CSN1, CSN2)
6.3.14
Input Current Limit and Monitoring (ILIM, IMON, DLY)
6.3.15
Maximum Duty Cycle and Minimum Controllable On-time Limits
6.3.16
Signal Deglitch Overview
6.3.17
MOSFET Drivers, Integrated Boot Diode, and Hiccup Mode Fault Protection (LOx, HOx, HBx-pin)
6.3.18
I2C Features
6.3.18.1
Register VOUT (0x0)
6.3.18.2
Register Configuration 1 (0x1)
6.3.18.3
Register Configuration 2 (0x2)
6.3.18.4
Register Configuration 3 (0x3)
6.3.18.5
Register Operation State (0x4)
6.3.18.6
Register Status Byte (0x5)
6.3.18.7
Register Clear Faults (0x6)
6.4
Device Functional Modes
6.4.1
Shutdown State
6.5
Programming
6.5.1
I2C Bus Operation
7
LM51251A-Q1 Registers
8
Application and Implementation
8.1
Application Information
8.1.1
Feedback Compensation
8.1.2
Non-synchronous Application
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Determine the Total Phase Number
8.2.2.2
Determining the Duty Cycle
8.2.2.3
Timing Resistor RT
8.2.2.4
Inductor Selection Lm
8.2.2.5
Current Sense Resistor Rcs
8.2.2.6
Current Sense Filter RCSFP, RCSFN, CCS
8.2.2.7
Low-Side Power Switch QL
8.2.2.8
High-Side Power Switch QH
8.2.2.9
Snubber Components
8.2.2.10
Vout Programming
8.2.2.11
Input Current Limit (ILIM/IMON)
8.2.2.12
UVLO Divider
8.2.2.13
Soft Start
8.2.2.14
CFG Settings
8.2.2.15
Output Capacitor Cout
8.2.2.16
Input Capacitor Cin
8.2.2.17
Bootstrap Capacitor
8.2.2.18
VCC Capacitor CVCC
8.2.2.19
BIAS Capacitor
8.2.2.20
VOUT Capacitor
8.2.2.21
Loop Compensation
8.2.3
Application Curves
8.2.3.1
Efficiency
8.2.3.2
Steady State Waveforms
8.2.3.3
Step Load Response
8.2.3.4
Sync Operation
8.2.3.5
AC Loop Response Curve
8.2.3.6
Thermal Performance
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RHB|32
MPQF130D
Thermal pad, mechanical data (Package|Pins)
RHB|32
QFND643
Orderable Information
slvshb3_oa
slvshb3_pm
Data Sheet
LM5125
1A
-Q1, Wide-VIN, Dual-Phase, Boost Controller With V
OUT
Tracking
and I2C