Provides auto-bidirectional voltage translation without direction pin
Supports open drain or push-pull applications such as I2C, I2S, SPI,
UART, JTAG, MDIO, SDIO, and GPIO
Supports up to 100-MHz up translation and greater
than 100-MHz down translation at ≤ 30-pF capacitor
load and up to 40-MHz up/down translation at 50-pF capacitor load
Supports Ioff, partial power down mode
(see Section 7.3)
Allows bidirectional voltage level translation
between
0.95 V ↔ 1.8, 2.5, 3.3,
5.5 V
1.2 V ↔ 1.8, 2.5, 3.3,
5.5 V
1.8 V ↔ 2.5, 3.3, 5.5
V
2.5 V ↔ 3.3, 5.5 V
3.3 V ↔ 5.5 V
5-V tolerance on I/O ports
Low Ron enables better signal
integrity
Flow-through pinout for easy PCB trace
routing
Latch-up performance exceeds 100 mA per
JESD17
2 Applications
I2S, JTAG, SPI, SDIO, UART, I2C, MDIO,
PMBus, SMBus and other interfaces