SBOS737C
January 2016 – March 2018
OPA197
,
OPA2197
,
OPA4197
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
OPA197 in a High-Voltage, Multiplexed, Data-Acquisition System
4
Revision History
5
Pin Configuration and Functions
Pin Functions: OPA197
Pin Functions: OPA2197 and OPA4197
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information: OPA197
6.5
Thermal Information: OPA2197
6.6
Thermal Information: OPA4197
6.7
Electrical Characteristics: VS = ±4 V to ±18 V (VS = 8 V to 36 V)
6.8
Electrical Characteristics: VS = ±2.25 V to ±4 V (VS = 4.5 V to 8 V)
6.9
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Input Protection Circuitry
7.3.2
EMI Rejection
7.3.3
Phase Reversal Protection
7.3.4
Thermal Protection
7.3.5
Capacitive Load and Stability
7.3.6
Common-Mode Voltage Range
7.3.7
Electrical Overstress
7.3.8
Overload Recovery
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
16-Bit Precision Multiplexed Data-Acquisition System
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curve
8.2.2
Slew Rate Limit for Input Protection
8.2.3
Precision Reference Buffer
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Development Support
11.1.1.1
TINA-TI (Free Software Download)
11.1.1.2
TI Precision Designs
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Related Links
11.4
Receiving Notification of Documentation Updates
11.5
Community Resources
11.6
Trademarks
11.7
Electrostatic Discharge Caution
11.8
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
D|8
MSOI002K
DGK|8
MPDS028E
DBV|5
MPDS018T
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sbos737c_oa
sbos737c_pm
1
Features
Low Offset Voltage: ±100 µV (Maximum)
Low Offset Voltage Drift: ±2.5 µV/°C (Maximum)
Low Noise: 5.5 nV/√
Hz
at 1 kHz
High Common-Mode Rejection: 120 dB (Minimum)
Low Bias Current: ±5 pA (Typical)
Rail-to-Rail Input and Output
Wide Bandwidth: 10-MHz GBW
High Slew Rate: 20 V/µs
Low Quiescent Current: 1 mA per Amplifier (Typical)
Wide Supply: ±2.25 V to ±18 V, +4.5 V to +36 V
EMI- and RFI-Filtered Inputs
Differential Input Voltage Range to Supply Rail
High Capacitive Load Drive Capability: 1 nF
Industry Standard Packages:
Single in SOIC-8, SOT-5, and VSSOP-8
Dual in SOIC-8 and VSSOP-8
Quad in SOIC-14 and TSSOP-14