Data Sheet
SN74LV6T07-Q1 Automotive Hex Open-Drain Buffers with Integrated Translation
1 Features
- AEC-Q100 qualified for automotive applications:
- Device temperature grade 1: -40°C to +125°C
- Device HBM ESD classification level 2
- Device CDM ESD classification level C4B
-
Available in wettable flank QFN package
- Wide operating range of 1.65 V to 5.5 V
- 5.5-V tolerant input pins
- LVxT enhanced inputs combined with
open-drain outputs provide maximum voltage translation
flexibility:
- Over 6.67-Mbps operation,
(RPU = 1 kΩ,
CL = 30 pF) - Up translation from 1.2 V to 5 V with 1.8-V supply
- Down translation from 5 V to 0.8 V or even less with any valid supply
- Over 6.67-Mbps operation,
(RPU = 1 kΩ,
- 5.5-V tolerant input pins
- Supports standard function pinout
- Latch-up performance exceeds 250
mA
per JESD 17
3 Description
The SN74LV6T07-Q1 device contains six independent buffers with open-drain outputs. Each buffer performs the Boolean function Y = A in positive logic.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).
Package Information
| PART NUMBER | PACKAGE(1) | PACKAGE SIZE(2) | BODY SIZE (NOM)(3) |
|---|---|---|---|
| SN74LV6T07-Q1 | BQA (WQFN, 14) | 3 mm × 2.5 mm | 3 mm × 2.5 mm |
| PW (TSSOP, 14) | 5 mm × 6.4 mm | 5 mm × 4.4 mm |
(1) For all available packages, see the orderable addendum at the end
of the data sheet.
(2) The package size (length × width) is a nominal value and includes
pins, where applicable.
(3) The body size (length × width) is a nominal value and does not
include pins.
Simplified Logic Diagram (Positive Logic)4 Revision History
| DATE | REVISION | NOTES |
|---|---|---|
| August 2023 | * | Initial Release |
5 Pin Configuration and Functions
Figure 5-1 SN74LV6T07-Q1 BQA Package, 14-Pin WQFN
(Top View)
Figure 5-2 SN74LV6T07-Q1 PW Package, 14-Pin TSSOP
(Top View)Table 5-1 Pin Functions
| PIN | TYPE(1) | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| 1A | 1 | I | Channel 1, A input |
| 1Y | 2 | O | Channel 1, Y output |
| 2A | 3 | I | Channel 2, A input |
| 2Y | 4 | O | Channel 2, Y output |
| 3A | 5 | I | Channel 3, A input |
| 3Y | 6 | O | Channel 3, Y output |
| GND | 7 | G | Ground |
| 4Y | 8 | O | Channel 4, Y output |
| 4A | 9 | I | Channel 4, A input |
| 5Y | 10 | O | Channel 5, Y output |
| 5A | 11 | I | Channel 5, A input |
| 6Y | 12 | O | Channel 6, Y output |
| 6A | 13 | I | Channel 6, A input |
| VCC | 14 | P | Positive supply |
| Thermal Pad(2) | — | The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply. | |
(1) I = input, O = output, I/O = input or output, G = ground, P
= power.
(2) BQA
package only.