SCES193N April 1999 – January 2015 SN74LVC2G00
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
This dual 2-input positive-NAND gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G00 device performs the Boolean function Y = A × B or Y = A + B in positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
SN74LVC2G00 | SM8 (8) | 2.95 mm × 2.80 mm |
US8 (8) | 2.30 mm × 2.00 mm | |
DSBGA (8) | 1.91 mm × 0.91 mm |