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  • TCA6424A Low-Voltage 24-Bit I2C and SMBus I/O Expander With Interrupt Output, Reset, and Configuration Registers

    • SCPS193D July   2010  – January 2023 TCA6424A

      PRODUCTION DATA  

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  • TCA6424A Low-Voltage 24-Bit I2C and SMBus I/O Expander With Interrupt Output, Reset, and Configuration Registers
  1. 1 Features
  2. 2 Description
  3. 3 Revision History
  4. 4 Description (continued)
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings (1)
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Reset Timing Requirements
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
      1. 8.1.1 Voltage Translation
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 I/O Port
      2. 8.3.2 I2C Interface
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Address
    5. 8.5 Programming
      1. 8.5.1 Power-On Reset
      2. 8.5.2 Reset Input ( RESET)
      3. 8.5.3 Interrupt Output ( INT)
      4. 8.5.4 Bus Transactions
        1. 8.5.4.1 Writes
        2. 8.5.4.2 Reads
    6. 8.6 Register Maps
      1. 8.6.1 Control Register and Command Byte
      2. 8.6.2 Register Descriptions
  9. 9 Application and Implementation
    1. 9.1 Typical Application
      1. 9.1.1 Detailed Design Procedure
        1. 9.1.1.1 Minimizing ICC When I/Os Control LEDs
    2. 9.2 Power Supply Recommendation
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
      1.      Mechanical, Packaging, and Orderable Information
  11. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • RGJ|32
    • MPQF183D
Thermal pad, mechanical data (Package|Pins)
Orderable Information
  • scps193d_oa
  • scps193d_pm
search No matches found.
  • Full reading width
    • Full reading width
    • Comfortable reading width
    • Expanded reading width
  • Card for each section
  • Card with all content

 

DATA SHEET

TCA6424A Low-Voltage 24-Bit I2C and SMBus I/O Expander With Interrupt Output, Reset, and Configuration Registers

1 Features

  • Operating power-supply voltage range of 1.65 V to 5.5 V
  • Allows bidirectional voltage-level translation and GPIO expansion between:
    • 1.8-V SCL/SDA and
      1.8-V, 2.5-V, 3.3-V, or 5-V P Port
    • 2.5-V SCL/SDA and
      1.8-V, 2.5-V, 3.3-V, or 5-V P Port
    • 3.3-V SCL/SDA and
      1.8-V, 2.5-V, 3.3-V, or 5-V P Port
    • 5-V SCL/SDA and
      1.8-V, 2.5-V, 3.3-V, or 5-V P Port
  • I2C to Parallel port expander
  • Low standby current consumption of 1 μA
  • Schmitt-Trigger action allows slow input transition and better switching noise immunity at the SCL and SDA inputs
    • Vhys = 0.18 V Typ at 1.8 V
    • Vhys = 0.25 V Typ at 2.5 V
    • Vhys = 0.33 V Typ at 3.3 V
    • Vhys = 0.5 V Typ at 5 V
  • 5-V Tolerant I/O ports
  • Active-low reset input ( RESET)
  • Open-drain active-low interrupt output ( INT)
  • 400-kHz Fast I2C Bus
  • Input/output configuration register
  • Polarity inversion register
  • Internal power-on reset
  • Power up with all channels configured as inputs
  • No glitch on power up
  • Noise filter on SCL/SDA inputs
  • Latched outputs with high-current drive maximum capability for directly driving LEDs
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000-V Human-body model (A114-A)
    • 200-V Machine model (A115-A)
    • 1000-V Charged-device model (C101)

2 Description

This 24-bit I/O expander for the two-line bidirectional bus (I2C) is designed to provide general-purpose remote I/O expansion for most microcontroller families via the I2C interface [serial clock (SCL) and serial data (SDA)].

The major benefit of this device is its wide VCC range. It can operate from 1.65 V to 5.5 V on the P-port side and on the SDA/SCL side. This allows the TCA6424A to interface with next-generation microprocessors and microcontrollers on the SDA/SCL side, where supply levels are dropping down to conserve power. In contrast to the dropping power supplies of microprocessors and microcontrollers, some PCB components, such as LEDs, remain at a 5-V power supply.

Package Information
DEVICE NAMEPACKAGE(1)BODY SIZE
TCA6424AUQFN (32)5.00 mm × 5.00 mm
(1) For all available packages, see the orderable addendum at the end of the datasheet.
GUID-35CEDD75-3D25-4D1C-A6ED-C61A8F2923EE-low.gif
If used, the exposed center pad must be connected as a secondary ground or left electrically open.
RGJ Package (Bottom View)

3 Revision History

Changes from Revision C (April 2014) to Revision D (January 2023)

  • Deleted all references to the RSM package Go
  • Changed all instances of legacy terminology to controller and target where I2C is mentionedGo
  • Deleted Package thermal impedance from the Absolute Maximum Ratings tableGo
  • Added Storage temperature range to the Absolute Maximum Ratings tableGo
  • Changed Handling Ratings To: ESD Ratings Go
  • Added the Thermal Information tableGo
  • Added the Application and Implementation NOTEGo
  • Added the Detailed Design Procedure sectionGo
  • Added paragraph: "Ramping up the device VCCP" to Power Supply Recommendations Go

Changes from Revision B (September 2010) to Revision C (April 2014)

  • Removed hard coded ordering information table. Go
  • Updated document formatting. Go

Changes from Revision A (August 2010) to Revision B (September 2010)

  • Revised document to updated document status from preview to production data.Go
  • Changed document status from "Product Preview to Production Data"Go

Changes from Revision * (July 2010) to Revision A (August 2010)

  • Changed Recommended Supply Sequencing and Rates TableGo

4 Description (continued)

The bidirectional voltage level translation in the TCA6424A is provided through VCCI. VCCI should be connected to the VCC of the external SCL/SDA lines. This indicates the VCC level of the I2C bus to the TCA6424A. The voltage level on the P-port of the TCA6424A is determined by the VCCP.

The TCA6424A consists of three 8-bit Configuration (input or output selection), Input, Output, and Polarity Inversion (active high) registers. At power on, the I/Os are configured as inputs. However, the system controller can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding input or output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system controller.

The system controller can reset the TCA6424A in the event of a timeout or other improper operation by asserting a low in the RESET input. The power-on reset puts the registers in their default state and initializes the I2C/SMBus state machine. The RESET pin causes the same reset/initialization to occur without depowering the part.

The TCA6424A open-drain interrupt ( INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system controller that an input state has changed.

INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C bus. Thus, the TCA6424A can remain a simple target device.

The device P-port outputs have high-current sink capabilities for directly driving LEDs while consuming low device current.

One hardware pin (ADDR) can be used to program and vary the fixed I2C address and allow up to two devices to share the same I2C bus or SMBus.

5 Pin Configuration and Functions

GUID-35CEDD75-3D25-4D1C-A6ED-C61A8F2923EE-low.gif
If used, the exposed center pad must be connected as a secondary ground or left electrically open.
Figure 5-1 RGJ Package
(Bottom View)
Table 5-1 Pin Functions
PINDESCRIPTION
PIN NO.NAME
1P00P-port input/output (push-pull design structure). At power on, P00 is configured as an input.
2P01P-port input/output (push-pull design structure). At power on, P01 is configured as an input.
3P02P-port input/output (push-pull design structure). At power on, P02 is configured as an input.
4P03P-port input/output (push-pull design structure). At power on, P03 is configured as an input.
5P04P-port input/output (push-pull design structure). At power on, P04 is configured as an input.
6P05P-port input/output (push-pull design structure). At power on, P05 is configured as an input.
7P06P-port input/output (push-pull design structure). At power on, P06 is configured as an input.
8P07P-port input/output (push-pull design structure). At power on, P07 is configured as an input.
9P10P-port input/output (push-pull design structure). At power on, P10 is configured as an input.
10P11P-port input/output (push-pull design structure). At power on, P11 is configured as an input.
11P12P-port input/output (push-pull design structure). At power on, P12 is configured as an input.
12P13P-port input/output (push-pull design structure). At power on, P13 is configured as an input.
13P14P-port input/output (push-pull design structure). At power on, P14 is configured as an input.
14P15P-port input/output (push-pull design structure). At power on, P15 is configured as an input.
15P16P-port input/output (push-pull design structure). At power on, P16 is configured as an input.
16P17P-port input/output (push-pull design structure). At power on, P17 is configured as an input.
17P20P-port input/output (push-pull design structure). At power on, P20 is configured as an input.
18P21P-port input/output (push-pull design structure). At power on, P21 is configured as an input.
19P22P-port input/output (push-pull design structure). At power on, P22 is configured as an input.
20P23P-port input/output (push-pull design structure). At power on, P23 is configured as an input.
21P24P-port input/output (push-pull design structure). At power on, P24 is configured as an input.
22P25P-port input/output (push-pull design structure). At power on, P25 is configured as an input.
23P26P-port input/output (push-pull design structure). At power on, P26 is configured as an input.
24P27P-port input/output (push-pull design structure). At power on, P27 is configured as an input.
25GNDGround
26ADDRAddress input. Connect directly to VCCP or ground.
27VCCPSupply voltage of TCA6424A for P port
28RESETActive-low reset input. Connect to VCCI through a pullup resistor, if no active connection is used.
29SCLSerial clock bus. Connect to VCCI through a pullup resistor.
30SDASerial data bus. Connect to VCCI through a pullup resistor.
31VCCISupply voltage of I2C bus. Connect directly to the VCC of the external I2C controller. Provides voltage-level translation.
32INTInterrupt output. Connect to VCCI through a pullup resistor.

6 Specifications

6.1 Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted)
MINMAXUNIT
VCCISupply voltage range–0.56.5V
VCCPSupply voltage range–0.56.5V
VIInput voltage range(2)–0.56.5V
VOOutput voltage range(2)–0.56.5V
IIKInput clamp currentADDR, RESET, SCLVI < 0±20mA
IOKOutput clamp currentINTVO < 0±20mA
IIOKInput/output clamp currentP portVO < 0 or VO > VCCP±20mA
SDAVO < 0 or VO > VCCI±20
IOLContinuous output low currentP portVO = 0 to VCCP25mA
SDA, INTVO = 0 to VCCI15
IOHContinuous output high currentP portVO = 0 to VCCP25mA
ICCContinuous current through GND200mA
Continuous current through VCCP160
Continuous current through VCCI10
TstgStorage temperature range–65150°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

6.2 ESD Ratings

MINMAXUNIT
V(ESD)Electrostatic dischargeHuman body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)02kV
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2)001kV
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as 2000 V may actually have higher performance.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Pins listed as 2000 V may actually have higher performance.

6.3 Recommended Operating Conditions

MINMAXUNIT
VCCISupply voltage1.655.5V
VCCPSupply voltage1.655.5V
VIHHigh-level input voltageSCL, SDA0.7 × VCCIVCCIV
RESET0.7 × VCCI5.5
ADDR, P27–P000.7 × VCCP5.5
VILLow-level input voltageSCL, SDA, RESET–0.50.3 × VCCIV
ADDR, P27–P00–0.50.3 × VCCP
IOHHigh-level output currentP27–P0010mA
IOLLow-level output currentP27–P0025mA
TAOperating free-air temperature–4085°C

6.4 Thermal Information

THERMAL METRIC(1)TCA6424AUNIT
RGJ (UQFN)
32 PINS
RθJAJunction-to-ambient thermal resistance44.9°C/W
RθJC(top)Junction-to-case (top) thermal resistance14.3°C/W
RθJBJunction-to-board thermal resistance17.7°C/W
ψJTJunction-to-top characterization parameter0.3°C/W
ψJBJunction-to-board characterization parameter17.7°C/W
RθJC(bottom)Junction-to-case (bottom) thermal resistance9.1°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

over recommended operating free-air temperature range, VCCI = 1.65 V to 5.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS VCCP MIN TYP(1) MAX UNIT
VIK Input diode clamp voltage II = –18 mA 1.65 V to 5.5 V –1.2 V
VPOR Power-on reset voltage VI = VCCP or GND, IO = 0 1.65 V to 5.5 V 1 1.4 V
VOH P-port high-level output voltage IOH = –8 mA 1.65 V 1.2 V
2.3 V 1.8
3 V 2.6
4.5 V 4.1
IOH = –10 mA 1.65 V 1
2.3 V 1.7
3 V 2.5
4.5 V 4.0
VOL P-port low-level output voltage IOL = 8mA 1.65 V 0.45 V
2.3 V 0.25
3 V 0.25
4.5 V 0.23
IOL = 10 mA 1.65 V 0.6
2.3 V 0.3
3 V 0.25
4.5 V 0.24
IOL SDA VOL = 0.4 V 1.65 V to 5.5 V 3 mA
INT VOL = 0.4 V 1.65 V to 5.5 V 3 15
II SCL, SDA, RESET VI = VCCI or GND 1.65 V to 5.5 V ±0.1 μA
ADDR VI = VCCP or GND ±0.1
IIH P port VI = VCCP 1.65 V to 5.5 V 1 μA
IIL P port VI = GND 1 μA
ICC
(ICCP + ICCI)		 Operating mode SDA,
P port,
ADDR,
RESET		 VI on SDA and RESET= VCCI or GND,
VI on P port and ADDR = VCCP,
IO = 0, I/O = inputs,
fSCL = 400 kHz		 1.65 V to 5.5 V 8 30 μA
SDA,
P port,
ADDR,
RESET		 VI on SDA and RESET= VCCI or GND,
VI on P port and ADDR = VCCP,
IO = 0, I/O = inputs,
fSCL = 100 kHz		 1.65 V to 5.5 V 1.7 10
Standby mode SCL,
SDA,
P port,
ADDR,
RESET		 VI on SCL, SDA and RESET = VCCI or GND,
VI on P port and ADDR = VCCP,
IO = 0, I/O = inputs,
fSCL = 0		 1.65 V to 5.5 V 0.1 3
ΔICCI Additional current in Standby mode SCL,SDA
RESET		 One input at VCCI – 0.6 V,
Other inputs at VCCI or GND		 1.65 V to 5.5 V 25 μA
ΔICCP P port,
ADDR,		 One input at VCCP – 0.6 V,
Other inputs at VCCP or GND		 60
CI SCL VI = VCCI or GND 1.65 V to 5.5 V 6 7 pF
Cio SDA VIO = VCCI or GND 1.65 V to 5.5 V 7 8 pF
P port VIO = VCCP or GND 7.5 8.5
(1) Except for ICC, all typical values are at nominal supply voltage (VCCP = VCCI =1.8-V, 2.5-V, 3.3-V, or 5-V VCC) and TA = 25°C. For ICC, all typical values are at VCCP = VCCI = 3.3 V and TA = 25°C.

6.6 I2C Interface Timing Requirements

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 7-1)
STANDARD MODE
I2C BUS		FAST MODE
I2C BUS		UNIT
MINMAXMINMAX
fsclI2C clock frequency01000400kHz
tschI2C clock high time40.6μs
tsclI2C clock low time4.71.3μs
tspI2C spike time050050ns
tsdsI2C serial data setup time250100ns
tsdhI2C serial data hold time00ns
ticrI2C input rise time100020 + 0.1Cb (1)300ns
ticfI2C input fall time30020 + 0.1Cb (1)300ns
tocfI2C output fall time; 10 pF to 400 pF bus30020 + 0.1Cb (1)300μs
tbufI2C bus free time between Stop and Start4.71.3μs
tstsI2C Start or repeater Start condition setup time4.70.6μs
tsthI2C Start or repeater Start condition hold time40.6μs
tspsI2C Stop condition setup time40.6μs
tvd(data)Valid data time; SCL low to SDA output valid11μs
tvd(ack)Valid data time of ACK condition; ACK signal from SCL low to SDA (out) low11μs
(1) Cb = total capacitance of one bus line in pF

6.7 Reset Timing Requirements

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 7-4)
STANDARD MODE
I2C BUS		FAST MODE
I2C BUS		UNIT
MINMAXMINMAX
tWReset pulse duration44ns
tRECReset recovery time00ns
tRESETTime to reset(1)600600ns
(1) Minimum time for SDA to become high or minimum time to wait before doing a START.

6.8 Switching Characteristics

over recommended operating free-air temperature range, CL ≤ 100 pF (unless otherwise noted) (see Figure 7-1)
PARAMETERFROMTOSTANDARD MODE
I2C BUS		FAST MODE
I2C BUS		UNIT
MINMAXMINMAX
tIVInterrupt valid timeP portINT44μs
tIRInterrupt reset delay timeSCLINT44μs
tPVOutput data validSCLP27–P00400400ns
tPSInput data setup timeP portSCL00ns
tPHInput data hold timeP portSCL300300ns

6.9 Typical Characteristics

TA = 25°C (unless otherwise noted)

GUID-9D770032-57D3-4D2E-8323-BF589302E87D-low.gifFigure 6-1 Supply Current vs Temperature
GUID-8E948825-1B3B-4DDD-A56C-54608E0773E9-low.gifFigure 6-3 Supply Current vs Supply Voltage
GUID-3AC8D23D-1284-4087-874B-A86C014A67C2-low.gifFigure 6-5 I/O Sink Current vs Output Low Voltage
GUID-8D15445C-E833-4212-A482-F427B0B758A6-low.gifFigure 6-7 I/O Sink Current vs Output Low Voltage
GUID-6C0BEAF2-B607-440E-8C0B-DA4D21816138-low.gifFigure 6-9 I/O Source Current vs Output High Voltage
GUID-55C2227B-1800-4F49-B98E-C5B0C1824656-low.gifFigure 6-11 I/O Source Current vs Output High Voltage
GUID-85E76D78-EAC0-4965-A753-98312E3C0984-low.gifFigure 6-13 I/O High Voltage vs Temperature
GUID-2A58AF0E-36E3-46FC-86FD-090E6DE6FF8D-low.gifFigure 6-2 Standby Supply Current vs Temperature
GUID-19EE59AD-8A9A-492C-BE45-40812A83B378-low.gifFigure 6-4 I/O Sink Current vs Output Low Voltage
GUID-FB5BA54C-41A1-40CA-9BAD-96E89F405C83-low.gifFigure 6-6 I/O Sink Current vs Output Low Voltage
GUID-6FB34EE4-7399-4D56-B17C-0EF4189EFC63-low.gifFigure 6-8 I/O Low Voltage vs Temperature
GUID-D4C02485-57FD-4873-9D68-1B769C47F71E-low.gifFigure 6-10 I/O Source Current vs Output High Voltage
GUID-298C5ECD-C39B-4FEF-8EE9-300BF2550509-low.gifFigure 6-12 I/O Source Current vs Output High Voltage

 
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