SCPS221G October   2010  – November 2018 TCA9406

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application Block Diagram for TCA9406
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements (VCCA = 1.8 V ± 0.15 V)
    7. 6.7  Timing Requirements (VCCA = 2.5 V ± 0.2 V)
    8. 6.8  Timing Requirements (VCCA = 3.3 V ± 0.3 V)
    9. 6.9  Switching Characteristics (VCCA = 1.8 V ± 0.15 V)
    10. 6.10 Switching Characteristics (VCCA = 2.5 V ± 0.2 V)
    11. 6.11 Switching Characteristics (VCCA = 3.3 V ± 0.3 V)
    12. 6.12 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Voltage Waveforms
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Architecture
      2. 8.3.2 Input Driver Requirements
      3. 8.3.3 Output Load Considerations
      4. 8.3.4 Enable and Disable
      5. 8.3.5 Pullup Resistors on I/O Lines
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • 2-Bit Bidirectional Translator for SDA and SCL Lines in I2C Applications
  • Provides Bidirectional Voltage Translation With No Direction Pin
  • High-Impedance Output SCL_A, SDA_A, SCL_B, SDA_B Pins When OE = Low or VCC = 0 V
  • Internal 10-kΩ Pullup Resistor on All SDA and SCL Pins
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (VCCA  ≤ VCCB)
  • VCC Isolation Feature: If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • No Power-Supply Sequencing Required: Either VCCA or VCCB Can Be Ramped First
  • Low Ioff of 2 µA When Either VCCA or VCCB = 0 V
  • OE Input Can Be Tied Directly to VCCA Or Controlled By GPIO
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port
      • 2500-V Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
    • B Port
      • 8-kV Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)