SCPS221G
October 2010 – November 2018
TCA9406
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Typical Application Block Diagram for TCA9406
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements (VCCA = 1.8 V ± 0.15 V)
6.7
Timing Requirements (VCCA = 2.5 V ± 0.2 V)
6.8
Timing Requirements (VCCA = 3.3 V ± 0.3 V)
6.9
Switching Characteristics (VCCA = 1.8 V ± 0.15 V)
6.10
Switching Characteristics (VCCA = 2.5 V ± 0.2 V)
6.11
Switching Characteristics (VCCA = 3.3 V ± 0.3 V)
6.12
Typical Characteristics
7
Parameter Measurement Information
7.1
Voltage Waveforms
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Architecture
8.3.2
Input Driver Requirements
8.3.3
Output Load Considerations
8.3.4
Enable and Disable
8.3.5
Pullup Resistors on I/O Lines
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Community Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
YZP|8
MXBG020L
DCU|8
MPDS050E
DCT|8
MPDS049D
Thermal pad, mechanical data (Package|Pins)
Orderable Information
scps221g_oa
scps221g_pm
1
Features
2-Bit Bidirectional Translator for SDA and SCL Lines in I
2
C Applications
Provides Bidirectional Voltage Translation With No Direction Pin
High-Impedance Output SCL_A, SDA_A, SCL_B, SDA_B Pins When OE = Low or V
CC
= 0 V
Internal 10-kΩ Pullup Resistor on All SDA and SCL Pins
1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (V
CCA
≤ V
CCB
)
V
CC
Isolation Feature: If Either V
CC
Input Is at GND, Both Ports Are in the High-Impedance State
No Power-Supply Sequencing Required: Either V
CCA
or V
CCB
Can Be Ramped First
Low I
off
of 2 µA When Either V
CCA
or V
CCB
= 0 V
OE Input Can Be Tied Directly to V
CCA
Or Controlled By GPIO
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
A Port
2500-V Human-Body Model (A114-B)
250-V Machine Model (A115-A)
1500-V Charged-Device Model (C101)
B Port
8-kV Human-Body Model (A114-B)
250-V Machine Model (A115-A)
1500-V Charged-Device Model (C101)