SLVSC35D
August 2013 – July 2019
TLV702-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Typical Application
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
Internal Current Limit
7.3.2
Shutdown
7.3.3
Dropout Voltage
7.3.4
Undervoltage Lockout
7.4
Device Functional Modes
7.4.1
Normal Operation
7.4.2
Dropout Operation
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Input and Output Capacitor Requirements
8.2.2.2
Transient Response
8.2.3
Application Curves
9
Power Supply Recommendations
9.1
Power Dissipation
10
Layout
10.1
Layout Guidelines
10.1.1
Thermal Consideration
10.1.2
Package Mounting
10.2
Layout Examples
11
Device and Documentation Support
11.1
Device Support
11.1.1
Development Support
11.1.1.1
Spice Models
11.1.2
Device Nomenclature
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
Community Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDC|5
MPDS123G
DSE|6
MPDS287A
DBV|5
MPDS018T
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsc35d_oa
slvsc35d_pm
1
Features
Qualified for Automotive Applications
AEC-Q100 Qualified with the Following Results:
Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
Device HBM ESD Classification Level H2
Device CDM ESD Classification Level C4B
Very Low Dropout:
37 mV at I
OUT
= 50 mA, V
OUT
= 2.8 V
75 mV at I
OUT
= 100 mA, V
OUT
= 2.8 V
220 mV at I
OUT
= 300 mA, V
OUT
= 2.8 V
2% Accuracy Over Temperature
Low I
Q
: 35 µA
Fixed-Output Voltage Combinations Possible from 1.2 V to 4.8 V
High PSRR: 68 dB at 1 kHz
Stable with Effective Capacitance of 0.1 µF
(1)
Thermal Shutdown and Overcurrent Protection
Packages: 5-Pin SOT (DBV and DDC) and
1.5-mm × 1.5-mm, 6-Pin WSON
(1)
1.
See the
Input and Output Capacitor Requirements
in the
Application Information
section.