SLVSE72B
September 2017 – June 2018
TPS565208
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Schematic
TPS565208 Load Regulation
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Adaptive On-Time Control and PWM Operation
7.3.2
Soft Start and Pre-Biased Soft Start
7.3.3
Current Protection
7.3.4
Undervoltage Lockout (UVLO) Protection
7.3.5
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Normal Operation
7.4.2
Standby Operation
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Custom Design With WEBENCH® Tools
8.2.2.2
Output Voltage Resistors Selection
8.2.2.3
Output Filter Selection
8.2.2.4
Input Capacitor Selection
8.2.2.5
Bootstrap Capacitor Selection
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Development Support
11.1.1
Custom Design With WEBENCH® Tools
11.2
Receiving Notification of Documentation Updates
11.3
Community Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
12.1
Package Option Addendum
12.1.1
Packaging Information
12.1.2
Tape and Reel Information
Package Options
Mechanical Data (Package|Pins)
DDC|6
MPDS124I
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvse72b_oa
slvse72b_pm
1
Features
5-A Maximum Output Current
Integrated 31-mΩ and 16-mΩ FETs
D-CAP2™ Mode Control with Fast Transient Response
Input Voltage Range: 4.5 V to 17 V
Output Voltage Range: 0.76 V to 7 V
Continuous Current Mode
500-kHz Switching Frequency
Low Shutdown Current of Less than 1 µA
1% Feedback Voltage Accuracy
Startup from Pre-biased Output Voltage
Cycle-by-Cycle Current Limit
Hiccup-mode Overcurrent Protection
Non-Latch UVP and TSD Protections
Fixed Soft Start: 1.0 ms
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