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TPS65381-Q1 Multirail Power Supply for Microcontrollers in Safety-Relevant Applications
SLVSBC4G
May 2012 – June 2017
TPS65381-Q1
PRODUCTION DATA.
CONTENTS
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TPS65381-Q1 Multirail Power Supply for Microcontrollers in Safety-Relevant Applications
1
Device Overview
1.1
Features
1.2
Applications
1.3
Description
1.4
Typical Application Diagram
2
Revision History
3
Pin Configuration and Functions
4
Specifications
4.1
Absolute Maximum Ratings
4.2
ESD Ratings
4.3
Recommended Operating Conditions
4.4
Thermal Information
4.5
Electrical Characteristics
4.6
Timing Requirements
4.7
Switching Characteristics
4.8
Typical Characteristics
5
Detailed Description
5.1
Overview
5.2
Functional Block Diagram
5.3
Feature Description
5.3.1
VDD6 Buck Switch-Mode Power Supply
5.3.2
VDD5 Linear Regulator
5.3.3
VDD3/5 Linear Regulator
5.3.4
VDD1 Linear Regulator
5.3.5
VSOUT1 Linear Regulator
5.3.6
Charge Pump
5.3.7
Wake-Up
5.3.8
Reset Extension
5.4
Device Functional Modes
5.4.1
Power-Up and Power-Down Behavior
5.4.2
Safety Functions and Diagnostics Overview
5.4.3
Voltage Monitor (VMON)
5.4.4
TPS65381-Q1 Internal Error Signals
5.4.5
Loss-of-Clock Monitor (LCMON)
5.4.6
Analog Built-In Self-Test (ABIST)
5.4.7
Logic Built-In Self-Test (LBIST)
5.4.8
Junction Temperature Monitoring and Current Limiting
5.4.9
Diagnostic MUX and Diagnostic Output Pin (DIAG_OUT)
5.4.9.1
Analog MUX (AMUX)
5.4.9.2
Digital MUX (DMUX)
5.4.9.3
Diagnostic MUX Output State (by MUX_OUT bit)
5.4.9.4
MUX Interconnect Check
5.4.10
Watchdog Timer (WD)
5.4.11
Watchdog Fail Counter, Status, and Fail Event
5.4.12
Watchdog Sequence
5.4.13
MCU to Watchdog Synchronization
5.4.14
Trigger Mode (Default Mode)
5.4.15
Q&A Mode
5.4.15.1
Watchdog Q&A Related Definitions
5.4.15.2
Watchdog Sequence in Q&A Mode
5.4.15.3
Question (Token) Generation
5.4.15.4
Answer Comparison and Reference Answer
5.4.15.4.1
Sequence of the 2-bit Watchdog Answer Counter
5.4.15.5
Watchdog Q&A Mode Sequence Events and WD_STATUS Register Updates
5.4.16
MCU Error Signal Monitor (MCU ESM)
5.4.16.1
TMS570 Mode
5.4.16.2
PWM Mode
5.4.17
Device Configuration Register Protection
5.4.18
Enable and Reset Driver Circuit
5.4.19
Device Operating States
5.4.20
STANDBY State
5.4.21
RESET State
5.4.22
DIAGNOSTIC State
5.4.23
ACTIVE State
5.4.24
SAFE State
5.4.25
State Transition Priorities
5.4.26
Power on Reset (NPOR)
5.5
Register Maps
5.5.1
Serial Peripheral Interface (SPI)
5.5.1.1
SPI Command Transfer Phase
5.5.1.2
SPI Data-Transfer Phase
5.5.1.3
Device Status Flag Byte Response
5.5.1.4
Device SPI Data Response
5.5.1.5
SPI Frame Overview
5.5.2
SPI Register Write Access Lock (SW_LOCK command)
5.5.3
SPI Registers (SPI Mapped Response)
5.5.3.1
Device Revision and ID
5.5.3.1.1
DEV_REV Register
5.5.3.1.2
DEV_ID Register
5.5.3.2
Device Status
5.5.3.2.1
DEV_STAT Register
5.5.3.3
Device Configuration
5.5.3.3.1
DEV_CFG1 Register
5.5.3.3.2
DEV_CFG2 Register
5.5.4
Device Safety Status and Control Registers
5.5.4.1
VMON_STAT_1 Register
5.5.4.2
VMON_STAT_2 Register
5.5.4.3
SAFETY_STAT_1 Register
5.5.4.4
SAFETY_STAT_2 Register
5.5.4.5
SAFETY_STAT_3 Register
5.5.4.6
SAFETY_STAT_4 Register
5.5.4.7
SAFETY_STAT_5 Register
5.5.4.8
SAFETY_ERR_CFG Register
5.5.4.9
SAFETY_BIST_CTRL Register
5.5.4.10
SAFETY_CHECK_CTRL Register
5.5.4.11
SAFETY_FUNC_CFG Register
5.5.4.12
SAFETY_ERR_STAT Register
5.5.4.13
SAFETY_ERR_PWM_H Register
5.5.4.14
SAFETY_ERR_PWM_L Register
5.5.4.15
SAFETY_PWD_THR_CFG Register
5.5.4.16
SAFETY_CFG_CRC Register
5.5.4.17
Diagnostics
5.5.4.17.1
DIAG_CFG_CTRL Register
5.5.4.17.2
DIAG_MUX_SEL Register
5.5.5
Watchdog Timer
5.5.5.1
WD_TOKEN_FDBK Register
5.5.5.2
WD_WIN1_CFG Register
5.5.5.3
WD_WIN2_CFG Register
5.5.5.4
WD_TOKEN_VALUE Register
5.5.5.5
WD_STATUS Register
5.5.5.6
WD_ANSWER Register
5.5.6
Sensor Supply
5.5.6.1
SENS_CTRL Register
6
Application and Implementation
6.1
Application Information
6.2
Typical Application
6.2.1
Design Requirements
6.2.2
Detailed Design Procedure
6.2.2.1
VDD6 Preregulator
6.2.2.2
VDD1 Linear Controller
6.2.2.3
VSOUT1 Tracking Linear Regulator, Configured to Track VDD5
6.2.2.4
Alternative Use for VSOUT1 Tracking Linear Regulator, Configured for 6-V Output Tracking VDD3/5 In 3.3-V Mode
6.2.2.5
Alternative Use for VSOUT1 Tracking Linear Regulator, Configured for 9-V Output Tracking to 5-V Input from VDD5
6.2.2.6
Alternative Use for VSOUT1 Tracking Linear Regulator, Configured in Non-tracking Mode Providing a 4.5-V Output
6.2.3
Application Curves
6.3
System Examples
7
Power Supply Recommendations
8
Layout
8.1
Layout Guidelines
8.1.1
VDD6 Buck Preregulator
8.1.2
VDD1 Linear Regulator Controller
8.1.3
VDD5 and VDD3/5 Linear Regulators
8.1.4
VSOUT1 Tracking Linear Regulator
8.1.5
Charge Pump
8.1.6
Other Considerations
8.2
Layout Example
8.3
Power Dissipation and Thermal Considerations
9
Device and Documentation Support
9.1
Device Support
9.1.1
Third-Party Products Disclaimer
9.2
Documentation Support
9.2.1
Related Documentation
9.3
Receiving Notification of Documentation Updates
9.4
Community Resources
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
DAP|32
MPDS380A
Thermal pad, mechanical data (Package|Pins)
DAP|32
PPTD231B
Orderable Information
slvsbc4g_oa
slvsbc4g_pm
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