SLVSG37
June 2021
TPS65994AE
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Recommended Capacitance
6.5
Thermal Information
6.6
Power Supply Characteristics
6.7
Power Consumption
6.8
PP_5V Power Switch Characteristics
6.9
PP_EXT Power Switch Characteristics
6.10
Power Path Supervisory
6.11
CC Cable Detection Parameters
6.12
CC VCONN Parameters
6.13
CC PHY Parameters
6.14
Thermal Shutdown Characteristics
6.15
ADC Characteristics
6.16
Input/Output (I/O) Characteristics
6.17
I2C Requirements and Characteristics
6.18
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
USB-PD Physical Layer
8.3.1.1
USB-PD Encoding and Signaling
8.3.1.2
USB-PD Bi-Phase Marked Coding
8.3.1.3
USB-PD Transmit (TX) and Receive (Rx) Masks
8.3.1.4
USB-PD BMC Transmitter
8.3.1.5
USB-PD BMC Receiver
8.3.1.6
Squelch Receiver
8.3.2
Power Management
8.3.2.1
Power-On And Supervisory Functions
8.3.2.2
VBUS LDO
8.3.3
Power Paths
8.3.3.1
Internal Sourcing Power Paths
8.3.3.1.1
PP_5Vx Current Clamping
8.3.3.1.2
PP_5Vx Local Overtemperature Shut Down (OTSD)
8.3.3.1.3
PP_5Vx Current Sense
8.3.3.1.4
PP_5Vx OVP
8.3.3.1.5
PP_5Vx UVLO
8.3.3.1.6
PP_5Vx Reverse Current Protection
8.3.3.1.7
Fast Role Swap
8.3.3.1.8
PP_CABLE Current Clamp
8.3.3.1.9
PP_CABLE Local Overtemperature Shut Down (OTSD)
8.3.3.1.10
PP_CABLE UVLO
8.3.3.2
Sink Path Control
8.3.3.2.1
Overvoltage Protection (OVP)
8.3.3.2.2
Reverse-Current Protection (RCP)
8.3.3.2.3
VBUS UVLO
8.3.3.2.4
Discharging VBUS to Safe Voltage
8.3.4
Cable Plug and Orientation Detection
8.3.4.1
Configured as a Source
8.3.4.2
Configured as a Sink
8.3.4.3
Configured as a DRP
8.3.4.4
Fast Role Swap Signal Detection
8.3.5
Default Behavior Configuration (ADCIN1, ADCIN2)
8.3.6
ADC
8.3.7
DisplayPort Hot-Plug Detect (HPD)
8.3.8
Digital Interfaces
8.3.8.1
General GPIO
8.3.8.2
I2C Interface
8.3.9
Digital Core
8.3.10
I2C Interface
8.3.10.1
I2C Interface Description
8.3.10.2
I2C Clock Stretching
8.3.10.3
I2C Address Setting
8.3.10.4
Unique Address Interface
8.4
Device Functional Modes
8.4.1
Pin Strapping to Configure Default Behavior
8.4.2
Power States
8.4.3
Thermal Shutdown
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Type-C VBUS Design Considerations
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
Type-C Connector VBUS Capacitors
9.2.1.2.2
VBUS Schottky and TVS Diodes
9.2.1.2.3
VBUS Snubber Circuit
9.2.1.3
Application Curves
9.2.2
Notebook Design Supporting PD Charging
9.2.2.1
USB and DisplayPort notebook Supporting PD Charging
9.2.2.1.1
Design Requirements
9.2.2.1.2
Detailed Design Procedure
9.2.2.1.2.1
USB Power Delivery Source Capabilities
9.2.2.1.2.2
USB Power Delivery Sink Capabilities
9.2.2.1.2.3
USB and DisplayPort Supported Data Modes
9.2.2.1.2.4
TUSB1046 Super Speed Mux GPIO Control
9.2.2.2
Thunderbolt Notebook Supporting PD Charging
9.2.2.2.1
Design Requirements
9.2.2.2.2
Detailed Design Procedure
9.2.2.2.2.1
USB Power Delivery Source Capabilities
9.2.2.2.2.2
USB Power Delivery Sink Capabilities
9.2.2.2.2.3
Thunderbolt Supported Data Modes
9.2.2.2.2.4
I2C Design Requirements
9.2.2.2.2.5
TS3DS10224 SBU Mux for AUX and LSTX/RX
10
Power Supply Recommendations
10.1
3.3-V Power
10.1.1
VIN_3V3 Input Switch
10.1.2
VBUS 3.3-V LDO
10.2
1.5-V Power
10.3
Recommended Supply Load Capacitance
11
Layout
11.1
Layout Guidelines
11.1.1
Top TPS65994AE Placement and Bottom Component Placement and Layout
11.2
Layout Example
11.3
Component Placement
11.4
Routing PP_5V, VBUS, VIN_3V3, LDO_3V3, LDO_1V5
11.5
Routing CC and GPIO
12
Device and Documentation Support
12.1
Device Support
12.1.1
Third-Party Products Disclaimer
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RSL|48
MPQF193A
Thermal pad, mechanical data (Package|Pins)
RSL|48
QFND155N
Orderable Information
slvsg37_oa
slvsg37_pm
1
Features
USB Power Delivery (PD) controller
USB PD 3.0 compliant
Fast role swap support
Physical layer and policy engine
Configurable at Boot and host-controlled
USB Type-C specification compliant
Cable attach and orientation detection
Default, 1.5-A or 3-A power advertisement
Integrated VCONN switch
Integrated VBUS sourcing port power switch
Two
5-V, 3-A, 29-mΩ sourcing switch
es
Adjustable current limiting
Undervoltage and overvoltage protection
Fast turn-on mode to support fast-role swap
UL recognized component (E169910)
High-voltage gate driver
s
for
two
sinking path
s
Reverse current protection
Slew rate control
Overvoltage protection
Alternate mode support
DisplayPort source
Thunderbolt™
USB type-C connector system software interface (USCI) support
Power management
Power supply from 3.3 V or VBUS source
3.3-V LDO output for dead battery support
QFN
package (0.4-mm pitch)