SLUSDU4A December   2020  – May 2022 UCC27289

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable
      2. 7.3.2 Start-up and UVLO
      3. 7.3.3 Input Stages
      4. 7.3.4 Level Shifter
      5. 7.3.5 Output Stage
      6. 7.3.6 Negative Voltage Transients
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Select Bootstrap and VDD Capacitor
        2. 8.2.2.2 External Bootstrap Diode and Series Resistor
        3. 8.2.2.3 Estimate Driver Power Losses
        4. 8.2.2.4 Selecting External Gate Resistor
        5. 8.2.2.5 Delays and Pulse Width
        6. 8.2.2.6 VDD and Input Filter
        7. 8.2.2.7 Transient Protection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Drives two N-channel MOSFETs in high-side low-side configuration

  • Enable/disable functionality in DRC package

  • Low current (7-μA) consumption when disabled

  • 16-ns typical propagation delay
  • 12-ns rise, 10-ns fall time with 1800-pF load (typical)
  • 1-ns typical delay matching
  • Integrated 100V bootstrap diode
  • 8-V typical undervoltage lockout
  • Absolute maximum negative voltage handling on inputs (–5 V)
  • Absolute maximum negative voltage handling on HS (–14 V)
  • ±3-A peak output current
  • Absolute maximum boot voltage 120 V
  • Inputs are independent of each other and VDD
  • Under voltage lockout for both channels
  • Specified from –40°C to 140°C junction temperature