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Analog-to-digital converters (ADCs)
High-speed ADCs (≥10 MSPS)
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ADC3683-SEP

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Radiation-tolerant, 30krad, 18bit, 65MSPS, dual-channel low power ADC

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Data sheet

ADC3683-SEP

ACTIVE
Data sheet Order now

Product details

Sample rate (max) (Msps) 65 Resolution (Bits) 18 Number of input channels 2 Interface type Serial LVDS Analog input BW (MHz) 200 Features Bypass Mode, Decimating Filter, Differential Inputs, Dual Channel, High Dynamic Range, High Performance, Internal Reference, LVDS interface, Low Power, Low latency Rating Space Peak-to-peak input voltage range (V) 3.2 Power consumption (typ) (mW) 186 Architecture SAR SNR (dB) 83.8 ENOB (Bits) 13.7 SFDR (dB) 89 Operating temperature range (°C) -55 to 105 Input buffer No
Sample rate (max) (Msps) 65 Resolution (Bits) 18 Number of input channels 2 Interface type Serial LVDS Analog input BW (MHz) 200 Features Bypass Mode, Decimating Filter, Differential Inputs, Dual Channel, High Dynamic Range, High Performance, Internal Reference, LVDS interface, Low Power, Low latency Rating Space Peak-to-peak input voltage range (V) 3.2 Power consumption (typ) (mW) 186 Architecture SAR SNR (dB) 83.8 ENOB (Bits) 13.7 SFDR (dB) 89 Operating temperature range (°C) -55 to 105 Input buffer No
WQFN (RSB) 40 25 mm² 5 x 5
  • Radiation tolerant (-SEP only):
    • Single-event latch-up (SEL) immune up to LET = 43 MeV-cm2/mg
    • Single-event functional interrupt (SEFI) characterized up to LET = 43 MeV-cm2/mg
    • Total ionizing dose (TID): 30 krad(Si)
  • Enhanced product (-EP and -SEP):
    • Meets ASTM E595 outgassing specification
    • Vendor item drawing (VID)
    • Temperature range: –55°C to 105°C
    • One fabrication, assembly, and test site
    • Gold bond wire, NiPdAu lead finish
    • Wafer lot traceability
    • Extended product life cycle
  • Dual channel, 65 MSPS ADC
  • 18-bit resolution (no missing codes)
  • Noise floor: -160 dBFS/Hz
  • Low power 94 mW/ch (at 65MSPS)
  • Latency: 1-2 clock cycles
  • INL: ±7, DNL: ±0.7 LSB (typical)
  • Reference options: external or internal
  • On-chip DSP (optional/bypassable)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • Serial LVDS digital interface (2-, 1- and 1/2-wire)
  • Small footprint: 40-QFN (5x5 mm) package
  • Spectral performance (fIN = 5MHz):
    • SNR: 83.8dBFS
    • SFDR: 89dBc HD2, HD3
    • SFDR: 101dBFS Worst spur
  • Radiation tolerant (-SEP only):
    • Single-event latch-up (SEL) immune up to LET = 43 MeV-cm2/mg
    • Single-event functional interrupt (SEFI) characterized up to LET = 43 MeV-cm2/mg
    • Total ionizing dose (TID): 30 krad(Si)
  • Enhanced product (-EP and -SEP):
    • Meets ASTM E595 outgassing specification
    • Vendor item drawing (VID)
    • Temperature range: –55°C to 105°C
    • One fabrication, assembly, and test site
    • Gold bond wire, NiPdAu lead finish
    • Wafer lot traceability
    • Extended product life cycle
  • Dual channel, 65 MSPS ADC
  • 18-bit resolution (no missing codes)
  • Noise floor: -160 dBFS/Hz
  • Low power 94 mW/ch (at 65MSPS)
  • Latency: 1-2 clock cycles
  • INL: ±7, DNL: ±0.7 LSB (typical)
  • Reference options: external or internal
  • On-chip DSP (optional/bypassable)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • Serial LVDS digital interface (2-, 1- and 1/2-wire)
  • Small footprint: 40-QFN (5x5 mm) package
  • Spectral performance (fIN = 5MHz):
    • SNR: 83.8dBFS
    • SFDR: 89dBc HD2, HD3
    • SFDR: 101dBFS Worst spur

The ADC3683-xEP uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports two-lane, one-lane and half-lane options. The device is available in a 40-pin QFN package (5 mm x 5 mm) and supports the extended temperature range from -55 to +105⁰C

The ADC3683-xEP uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports two-lane, one-lane and half-lane options. The device is available in a 40-pin QFN package (5 mm x 5 mm) and supports the extended temperature range from -55 to +105⁰C
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Technical documentation

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Type Title Date
* Data sheet ADC3683-SEP ADC3683-EP 18-bit 65MSPS Low Noise Low Power Dual Channel ADC datasheet PDF | HTML 11 Feb 2025
* Radiation & reliability report ADC3683-SEP Total Ionizing Dose (TID) Radiation Report 07 Feb 2025
* Radiation & reliability report ADC3683-SEP Production Flow and Reliability Report PDF | HTML 03 Feb 2025

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Evaluation board

ADC3683EVM — ADC3683 dual-channel, 18-bit, 65-MSPS, low-noise, ultra-low-power ADC evaluation module

The ADC3683 evaluation module (EVM) is a platform that demonstrates the performance of the ultra-low-power, high-linearity ADC3683. Onboard voltage regulation and flexible analog input options allow easy evaluation for many different applications.

For a complete evaluation system, use the TSW1400EVM (...)

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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