Support software
ADS125H02-C-EXAMPLE-CODE — ADS125H02 example C code
Expedite your embedded design using this example C code for the ADS125H02
Data sheet
ADS125H01
- ±20-V input, 24-bit delta-sigma ADC
- Programmable data rate: 2.5 SPS to 40 kSPS
- High-voltage, 1-GΩ input impedance PGA:
- Differential input range: up to ±20 V
- Absolute input range: up to ±15.5 V
- Programmable attenuation and gain:
- 0.125 to 128
- High-performance ADC:
- Noise: 45 nVRMS (gain = 128, 20 SPS)
- CMRR: 105 dB
- 50-Hz and 60-Hz rejection: 95 dB
- Offset drift: 10 nV/°C
- Gain drift: 1 ppm/°C
- INL: 2 ppm
- Integrated features and diagnostics:
- Internal oscillator
- Signal and reference voltage monitors
- Cyclic redundancy check (CRC)
- Power supplies:
- AVDD: 4.75 V to 5.25 V
- DVDD: 2.7 V to 5.25 V
- HVDD: ±5 V to ±18 V
- Operating temperature: –40°C to +125°C
- 5-mm × 5-mm VQFN package
The ADS125H01 is a ±20-V input, 24-bit, delta-sigma (ΔΣ) analog-to-digital converter (ADC). The ADC features a low-noise programmable gain amplifier (PGA), a clock oscillator, and signal or reference out-of-range monitors.
The integration of a wide input range, ±18-V supply PGA and an ADC into a single package reduces board area up to 50% compared to discrete solutions.
Programmable attenuation and gain of 0.125 to 128 (corresponding to an equivalent input range from ±20 V to ±20 mV) eliminates the need for an external attenuator or external gain stages. A 1-GΩ minimum input impedance reduces error resulting from sensor loading. Additionally, the low-noise and low-drift performance allow direct connections to strain-gauge bridge and thermocouple sensors that are affected by high common-mode voltage.
The digital filter is programmable over a wide range from 2.5 SPS to 40 kSPS. Attenuation of 50-Hz and 60-Hz line cycle noise for data rates ≤ 50 SPS or 60 SPS reduces measurement error. In most data rates, the filter provides no-latency conversion data for high data throughput during external channel sequencing.
The ADS125H01 is housed in a 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +125°C temperature range.
Technical documentation
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View all 9 | Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | ADS125H01 ±20-V Input, 40-kSPS, 24-Bit, Delta-Sigma ADC datasheet (Rev. A) | PDF | HTML | 15 Jan 2021 |
| Application note | A Simple, Java-Based CRC Calculator | PDF | HTML | 04 Mar 2026 | |
| Circuit design | 來自 +5V 供電電源且用於高電壓資料轉換器的精密、±15V 電 源供應電路 | PDF | HTML | 09 Dec 2025 | |
| Circuit design | Precision, ±15V Power Supply Circuit from a +5V Source for High-Voltage Data Converters | PDF | HTML | 04 Dec 2025 | |
| Application note | Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) | PDF | HTML | 18 Mar 2024 | |
| Application note | A Basic Guide to Bridge Measurements (Rev. A) | PDF | HTML | 13 Mar 2024 | |
| Application note | Digital Filter Types in Delta-Sigma ADCs (Rev. A) | PDF | HTML | 29 Mar 2023 | |
| Application note | Communication Methods for Data Integrity Using Delta-Sigma Data Converters (Rev. A) | PDF | HTML | 23 Aug 2021 | |
| E-book | Fundamentals of Precision ADC Noise Analysis (Rev. A) | 19 Jun 2020 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
Evaluation board
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User guide: PDF
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Design tool
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Simulation tool
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User guide: PDF
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VQFN (RHB) | 32 | Ultra Librarian |
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