ADS7279
- 2.7V to 5.5V Analog Supply, Low Power:
- 13.7mW (1MHz, +VA = 3V, +VBD = 1.8V)
- 1MHz Sampling Rate 3V ≤ +VA ≤ 5.5V,
900kHz Sampling Rate 2.7V ≤ +VA ≤ 3V - Excellent DC Performance:
- ±0.4LSB Typ, ±1.0LSB Max INL
- ±0.4LSB Typ, ±1.0LSB Max DNL
- ±0.8mV Max Offset Error at 3V
- ±1.25mV Max Offset Error at 5V
- Excellent AC Performance at fi = 10kHz with 85.9dB SNR, 105.3dB SFDR, -100.1dB THD
- Built-In Conversion Clock (CCLK)
- 1.65V to 5.5V I/O Supply:
- SPI/DSP-Compatible Serial Interface
- SCLK up to 50MHz
- Comprehensive Power-Down Modes:
- Deep Power-Down
- Nap Power-Down
- Auto Nap Power-Down
- Unipolar Input Range: 0V to VREF
- Software Reset
- Global CONVST (Independent of CS)
- Programmable Status/Polarity EOC/INT
- 4 × 4 QFN-16 and TSSOP-16 Packages
- Multi-Chip Daisy-Chain Mode
- Programmable TAG Bit Output
- Auto/Manual Channel Select Mode (ADS7280)
- APPLICATIONS
- Communications
- Transducer Interface
- Medical Instruments
- Magnetometers
- Industrial Process Control
- Data Acquisition Systems
- Automatic Test Equipment
The ADS7279 is a low-power, 14-bit, 1MSPS analog-to-digital converter (ADC) with a unipolar input. The device includes a 14-bit, capacitor-based successive approximation register (SAR) ADC with inherent sample-and-hold.
The ADS7280 is based on the same core and includes a 2-to-1 input MUX with a programmable TAG bit output option. Both the ADS7279 and ADS7280 offer a high-speed, wide voltage serial interface, and are capable of daisy-chain mode operation when multiple converters are used.
These converters are available in 4 × 4 QFN and TSSOP-16 packages, and are fully specified for operation over the industrial -40°C to +85°C temperature range.
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Technical documentation
Type | Title | Date | ||
---|---|---|---|---|
* | Data sheet | LOW-POWER, 14-BIT, 1MHz, SINGLE/DUAL UNIPOLAR INPUT, ADC w/SERIAL INTERFACE datasheet (Rev. A) | 17 Jun 2009 | |
E-book | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 21 May 2015 | ||
Application note | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 17 Mar 2011 | ||
Application note | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 10 Nov 2010 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
Supported products & hardware
Products
Precision op amps (Vos<1mV)
General-purpose op amps
Audio op amps
Transimpedance amplifiers
High-speed op amps (GBW ≥ 50 MHz)
Power op amps
Video amplifiers
Line drivers
Transconductance amplifiers & laser drivers
Fully differential amplifiers
Precision ADCs
Biosensing AFEs
High-speed ADCs (≥10 MSPS)
Receivers
Touchscreen controllers
Difference amplifiers
Instrumentation amplifiers
Audio line receivers
Analog current-sense amplifiers
Digital power monitors
Analog current-sense amplifiers with integrated shunt resistor
Digital power monitors with integrated shunt resistor
Die & wafer services
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
TINA-TI — SPICE-based analog simulation program
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
TSSOP (PW) | 16 | Ultra Librarian |
VQFN (RSA) | 16 | Ultra Librarian |
Ordering & quality
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- Lead finish/Ball material
- MSL rating/Peak reflow
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- Assembly location
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Support & training
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