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ADS8319

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Precision 16-Bit SAR Analog-to-Digital Converter (ADC) With SPI Interface

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Data sheet

ADS8319

ACTIVE
Data sheet Order now

Product details

Resolution (Bits) 16 Sample rate (max) (ksps) 500 Number of input channels 1 Interface type SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Small Size Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 18 Analog supply voltage (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 SNR (dB) 93.9 Digital supply (min) (V) 2.375 Digital supply (max) (V) 5.5
Resolution (Bits) 16 Sample rate (max) (ksps) 500 Number of input channels 1 Interface type SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Small Size Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 18 Analog supply voltage (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 SNR (dB) 93.9 Digital supply (min) (V) 2.375 Digital supply (max) (V) 5.5
VSSOP (DGS) 10 14.7 mm² (3 mm × 4.9 mm) VSON (DRC) 10 9 mm² (3 mm × 3 mm)
  • 500-kHz Sample Rate
  • 16-Bit Resolution
  • Zero Latency at Full Speed
  • Unipolar, Single-Ended Input Range: 0 V to VREF
  • SPI-Compatible Serial Interface With Daisy-Chain Option
  • Excellent Performance:
    • 93.6-dB SNR (Typical) at 10-kHz Input
    • –106-dB THD (Typical) at 10-kHz Input
    • ±1.5-LSB (Maximum) INL
    • ±1-LSB (Maximum) DNL
  • Low Power Dissipation: 18 mW (Typical) at 500 kSPS
  • Power Scales Linearly with Speed: 3.6 mW / 100 kSPS
  • Power Dissipation During Power-Down State: 0.25 µW (Typical)
  • 10-Pin VSSOP and VSON Packages
  • 500-kHz Sample Rate
  • 16-Bit Resolution
  • Zero Latency at Full Speed
  • Unipolar, Single-Ended Input Range: 0 V to VREF
  • SPI-Compatible Serial Interface With Daisy-Chain Option
  • Excellent Performance:
    • 93.6-dB SNR (Typical) at 10-kHz Input
    • –106-dB THD (Typical) at 10-kHz Input
    • ±1.5-LSB (Maximum) INL
    • ±1-LSB (Maximum) DNL
  • Low Power Dissipation: 18 mW (Typical) at 500 kSPS
  • Power Scales Linearly with Speed: 3.6 mW / 100 kSPS
  • Power Dissipation During Power-Down State: 0.25 µW (Typical)
  • 10-Pin VSSOP and VSON Packages

The ADS8319 device is a 16-bit, 500-kSPS, analog-to-digital converter (ADC) that operates with a 2.25-V to 5.5-V external reference. The device includes a capacitor-based, successive-approximation register (SAR) ADC with inherent sample and hold.

The device includes a 50-MHz, SPI-compatible serial interface. The interface is designed to support daisy-chaining or cascading of multiple devices. Furthermore, a Busy Indicator makes synchronizing with the digital host easy.

The device unipolar, single-ended input range supports an input swing of 0 V to +VREF.

Device operation is optimized for very-low power operation and the power consumption directly scales with speed. This feature makes the device attractive for lower-speed applications. The device is available in 10-pin VSSOP and VSON packages.

The ADS8319 device is a 16-bit, 500-kSPS, analog-to-digital converter (ADC) that operates with a 2.25-V to 5.5-V external reference. The device includes a capacitor-based, successive-approximation register (SAR) ADC with inherent sample and hold.

The device includes a 50-MHz, SPI-compatible serial interface. The interface is designed to support daisy-chaining or cascading of multiple devices. Furthermore, a Busy Indicator makes synchronizing with the digital host easy.

The device unipolar, single-ended input range supports an input swing of 0 V to +VREF.

Device operation is optimized for very-low power operation and the power consumption directly scales with speed. This feature makes the device attractive for lower-speed applications. The device is available in 10-pin VSSOP and VSON packages.
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Technical documentation

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* Data sheet ADS8319 16-Bit, 500-kSPS, Serial Interface, Micropower, Miniature, SAR Analog-to-Digital Converter datasheet (Rev. C) PDF | HTML Dec 9, 2016
Circuit design Antialiasing filter circuit design for single-ended ADC input using fixed cutoff (Rev. B) PDF | HTML Sep 24, 2024
Circuit design Circuit for protecting low-voltage SAR ADC from electrical overstress with minim (Rev. A) PDF | HTML Sep 19, 2024
White paper Voltage-reference impact on total harmonic distortion Aug 1, 2016
More literature SAR ADCs for PLC Applications PDF | HTML Feb 11, 2016
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs May 21, 2015
Application note Determining Minimum Acquisition Times for SAR ADCs, part 2 Mar 17, 2011
Analog design Journal The IBIS model, Part 2: Determining the total quality of an IBIS model Mar 14, 2011
Application note Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) Nov 10, 2010
Application note Low Power Input and Reference Driver Circuit for ADS8318 and ADS8319 Jun 24, 2009

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Support software

SBAC197 — Source Files for SBAA282

Supported products & hardware
Simulation model

ADS8319 IBIS Model

SBAM087.ZIP (28 KB) - IBIS model
Supported products & hardware
Simulation model

ADS8319 TINA-TI Spice Model

SLAM206.ZIP (50 KB) - TINA-TI Spice model
Supported products & hardware
Simulation model

ADS8319 TINA-TI Transient Reference Design

SLAM207.TSC (2625 KB) - TINA-TI reference design
Supported products & hardware
Calculation tool

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

Supported products & hardware
Calculation tool

JITTER-SNR-CALC — Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

Supported products & hardware
Design tool

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
VSSOP (DGS) 10 Ultra Librarian
VSON (DRC) 10 Ultra Librarian
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