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Noninverting buffers & drivers

CD74HCT365

ACTIVE

6-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

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Data sheet

CD74HCT365

ACTIVE
Data sheet Order now

Product details

Technology family HCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 6 IOL (max) (mA) 6 Supply current (max) (µA) 160 IOH (max) (mA) -6 Input type TTL-Compatible CMOS Output type 3-State Features Balanced outputs, High speed (tpd 10-50ns), Input clamp diode Rating Catalog Operating temperature range (°C) -55 to 125
Technology family HCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 6 IOL (max) (mA) 6 Supply current (max) (µA) 160 IOH (max) (mA) -6 Input type TTL-Compatible CMOS Output type 3-State Features Balanced outputs, High speed (tpd 10-50ns), Input clamp diode Rating Catalog Operating temperature range (°C) -55 to 125
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6
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CD74HCT244 ACTIVE 6-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs Voltage range (4.5V to 5.5V), average drive strength (4mA), average propagation delay (22ns)

Technical documentation

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Type Title Date
* Data sheet High Speed CMOS Logic Hex Buffer/Line Driver, Three-State Non-Inverting and Inverting datasheet (Rev. D) PDF | HTML 19 Jul 2022
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Simulation model

CD74HCT365 Behavioral SPICE Model

SCHM108.ZIP (7 KB) - PSpice Model
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Package Pins CAD symbols, footprints & 3D models
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

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